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Mon, 24 Aug 2026 10:00:15 -0700 (PDT) X-Received: by 2002:a17:90b:4b0a:b0:38d:ddc2:7ccb with SMTP id 98e67ed59e1d1-396462ff21fmr510221a91.1.1787590814598; Mon, 24 Aug 2026 10:00:14 -0700 (PDT) Received: from [192.168.0.6] ([49.204.106.1]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-141860fe08csm41584554c88.8.2026.08.24.10.00.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 24 Aug 2026 10:00:14 -0700 (PDT) Message-ID: <52ed6e1d-57a3-49e2-91df-0886b416282b@oss.qualcomm.com> Date: Mon, 24 Aug 2026 22:30:07 +0530 Precedence: bulk X-Mailing-List: arm-scmi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/7] soc: qcom: geni-se: Add helper to set SE clock rate via OPP To: Konrad Dybcio , Sudeep Holla , Cristian Marussi , Ulf Hansson , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Jiri Slaby , Mark Brown , Viken Dadhaniya , Andi Shyti Cc: mukesh.savaliya@oss.qualcomm.com, chandana.chiluveru@oss.qualcomm.com, arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org References: <20260805-derive_clk_perf_tbl_from_perf_domain_opp_table-v1-0-61171ab1cdce@oss.qualcomm.com> <20260805-derive_clk_perf_tbl_from_perf_domain_opp_table-v1-3-61171ab1cdce@oss.qualcomm.com> <5d2504be-0691-4174-9d98-7759205718cd@oss.qualcomm.com> Content-Language: en-US From: Praveen Talari In-Reply-To: <5d2504be-0691-4174-9d98-7759205718cd@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Info: AW1haW4tMjYwODI0MDE0MyBTYWx0ZWRfX8xuuCLU4W+5u 9lacHQdUOrq7lcL/AlI90YFnOv5F/rZfy7VpfeMaUAvBerchpYxNE47JqamiqVHIY0kWnnA3T0S hDD2HwF9Udkz+KS4WKYYDnYDREKPT/Q= X-Proofpoint-GUID: yldpIgnwAzfkyGZ8ci556dLtOSStagFJ X-Authority-Analysis: v=2.4 cv=fqXsol4f c=1 sm=1 tr=0 ts=6a8c78a0 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=3DKySdf3VQHjbkfL60kt6A==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=k7YlSEv--4VGoxf32YcA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODI0MDE0MyBTYWx0ZWRfXzb7MLnZwjXC7 9raB+TAdWM2jMaQJ0yvlkdg4yi3RO43wsMdKqzlZU8UVHpNRdHH1GM37+r7QcxPX95IAeTpzpwK y8TKNjT9DqoXJrlRCu7jBujmjb3ond8aU59RmeezKJ7/PbR2f+oapW7e+itZpxMtRLoe5FNzEzC NqGNlKREnmaT6otRo7GU/tyQEVTf4S30H6zXayPjpEEkJvgzyEmZCkl3XiFt/t5f4+QJen8H7Mx a8wCQnxajHV2hoZnWSy9n2VGcGe401MthY361ECPOMc+OfpXfX6r/Zbo7T6sRnXYrKe4ab3Nclm Tf/xp5dW9687En/Mq0MPoZmG/6BtTi3ENp7eLTGS73Tb3o2AFhEl7HrxKr6juFK9ELr5yu+Ghp+ xQbbnu38sPRVrjHxiF1fpHSScWBR1voUngw5qde6WOLO63ymLJz/4YITaEWJIMYSzsMSmh94/J+ c3R7aZE89dTcOjcIUHw== X-Proofpoint-ORIG-GUID: yldpIgnwAzfkyGZ8ci556dLtOSStagFJ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-24_05,2026-08-24_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 impostorscore=0 phishscore=0 clxscore=1015 spamscore=0 lowpriorityscore=0 suspectscore=0 malwarescore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608240143 On 24-08-2026 20:28, Konrad Dybcio wrote: > On 8/4/26 9:57 PM, Praveen Talari wrote: >> GENI protocol drivers need a common way to scale the SE source clock >> through the OPP framework. However, the device that owns the OPP table >> differs depending on how the SE resources are managed. For Linux clock >> managed platforms, the OPP table is associated with the SE device, >> whereas on firmware-managed platforms it is associated with the >> performance power-domain device. This requires protocol drivers to be >> aware of the underlying resource management model when requesting >> frequency changes. > [...] > >> +/** >> + * geni_se_set_rate() - Set the SE source clock rate via the OPP framework. >> + * @se: Pointer to the struct geni_se instance. >> + * @freq: The source clock frequency to set. >> + * >> + * Applies the given frequency through dev_pm_opp_set_rate(), targeting the >> + * perf domain device when the SE has power domains attached (firmware >> + * managed path), or se->dev otherwise (Linux clock managed path). >> + * >> + * Return: 0 on success, or a negative error code on failure. >> + */ >> +int geni_se_set_rate(struct geni_se *se, unsigned long freq) >> +{ >> + struct device *perf_dev = se->dev; >> + >> + if (se->pd_list && se->pd_list->pd_devs[DOMAIN_IDX_PERF]) > The latter will always be true if the former is Sure. I'll simplify the condition to just check se->pd_list. Thanks, Praveen Talari > > Konrad > >> + perf_dev = se->pd_list->pd_devs[DOMAIN_IDX_PERF]; >> + >> + return se->has_opp ? dev_pm_opp_set_rate(perf_dev, freq) : 0;