diff for duplicates of <5301C909.1090401@nvidia.com> diff --git a/a/1.txt b/N1/1.txt index d2b81c0..0c60979 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On Saturday 15 February 2014 03:28 AM, Stephen Warren wrote: -> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +> From: Stephen Warren <swarren@nvidia.com> > > The Tegra PMC's resume-from-sleep logic wants an active-low IRQ input > from the PMIC. However, the PMIC IRQ is also routed to the GIC, which @@ -18,4 +18,4 @@ On Saturday 15 February 2014 03:28 AM, Stephen Warren wrote: > Looks good to me. -Acked-by: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> +Acked-by: Laxman Dewangan <ldewangan@nvidia.com> diff --git a/a/content_digest b/N1/content_digest index 8d4df39..cc0a55a 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,29 +1,13 @@ "ref\01392415108-4365-1-git-send-email-swarren@wwwdotorg.org\0" "ref\01392415108-4365-2-git-send-email-swarren@wwwdotorg.org\0" - "ref\01392415108-4365-2-git-send-email-swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org\0" - "From\0Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" - "Subject\0Re: [PATCH 2/2] ARM: tegra: fix Dalmore PMIC IRQ polarity\0" + "From\0ldewangan@nvidia.com (Laxman Dewangan)\0" + "Subject\0[PATCH 2/2] ARM: tegra: fix Dalmore PMIC IRQ polarity\0" "Date\0Mon, 17 Feb 2014 14:02:09 +0530\0" - "To\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>" - Samuel Ortiz <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> - " Lee Jones <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\0" - "Cc\0devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>" - Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> - Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> - Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> - Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> - Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> - linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org <linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org> - linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org <linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org> - J Keerthy <j-keerthy-l0cyMroinI0@public.gmane.org> - Ian Lartey <ian-kDsPt+C1G03kYMGBc/C6ZA@public.gmane.org> - Stefan Agner <stefan-XLVq0VzYD2Y@public.gmane.org> - Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - " Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Saturday 15 February 2014 03:28 AM, Stephen Warren wrote:\n" - "> From: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>\n" + "> From: Stephen Warren <swarren@nvidia.com>\n" ">\n" "> The Tegra PMC's resume-from-sleep logic wants an active-low IRQ input\n" "> from the PMIC. However, the PMIC IRQ is also routed to the GIC, which\n" @@ -42,6 +26,6 @@ ">\n" "Looks good to me.\n" "\n" - Acked-by: Laxman Dewangan <ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> + Acked-by: Laxman Dewangan <ldewangan@nvidia.com> -2780868e18d77845c15165e933e0bfb77b75027e2cad8922c7236b847ed08718 +6614ee9a758cbb64f03707f117fd7ad60a74fc093c937fb52ee2507f0c709b4a
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