From mboxrd@z Thu Jan 1 00:00:00 1970 From: Julien Grall Subject: Re: [PATCH v2 09/15] xen/passthrough: iommu: Introduce arch specific code Date: Mon, 24 Feb 2014 12:57:57 +0000 Message-ID: <530B41D5.8070803@linaro.org> References: <1393193792-20008-1-git-send-email-julien.grall@linaro.org> <1393193792-20008-10-git-send-email-julien.grall@linaro.org> <530B3083020000780011EAB1@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WHv6f-0000Gy-Hp for xen-devel@lists.xenproject.org; Mon, 24 Feb 2014 12:58:01 +0000 Received: by mail-ee0-f53.google.com with SMTP id c13so295098eek.12 for ; Mon, 24 Feb 2014 04:58:00 -0800 (PST) In-Reply-To: <530B3083020000780011EAB1@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich Cc: Keir Fraser , ian.campbell@citrix.com, Shane Wang , Joseph Cihula , tim@xen.org, stefano.stabellini@citrix.com, Suravee Suthikulpanit , xen-devel@lists.xenproject.org, Gang Wei , Xiantao Zhang List-Id: xen-devel@lists.xenproject.org Hi Jan, On 02/24/2014 10:44 AM, Jan Beulich wrote: >>>> On 23.02.14 at 23:16, Julien Grall wrote: >> --- a/xen/include/xen/hvm/iommu.h >> +++ b/xen/include/xen/hvm/iommu.h >> @@ -23,32 +23,8 @@ >> #include >> #include >> >> -struct g2m_ioport { >> - struct list_head list; >> - unsigned int gport; >> - unsigned int mport; >> - unsigned int np; >> -}; >> - >> -struct mapped_rmrr { >> - struct list_head list; >> - u64 base; >> - u64 end; >> -}; >> - >> struct hvm_iommu { >> - u64 pgd_maddr; /* io page directory machine address */ >> - spinlock_t mapping_lock; /* io page table lock */ >> - int agaw; /* adjusted guest address width, 0 is level 2 30-bit */ >> - struct list_head g2m_ioport_list; /* guest to machine ioport mapping */ >> - u64 iommu_bitmap; /* bitmap of iommu(s) that the domain uses */ >> - struct list_head mapped_rmrrs; >> - >> - /* amd iommu support */ >> - int domain_id; > > At the very least this field doesn't look all that architecture specific, > even if it might only be used on x86/AMD right now. On ARM, each IOMMU will have it's own private data stored in arch.priv. I don't think domain_id will be used as the driver can directly use d->domain_id. I gave a look on AMD IOMMU drivers, and in a same function they mixed d->domain_id and domain_hvm_iommu(d)->arch.domain_id. The latter one has been initialized to d->domain_id in amd_iommu_domain_init. I think, we can even remove this field for x86... >> - int paging_mode; > > The same might go for this one. There is only one paging mode on ARM. Cheers, -- Julien Grall