From mboxrd@z Thu Jan 1 00:00:00 1970 From: Paolo Bonzini Subject: Re: KVM x86: Infinite loop on updating accessed bit in r/o page table Date: Tue, 25 Feb 2014 11:57:21 +0100 Message-ID: <530C7711.1050102@redhat.com> References: <530B8F92.50202@siemens.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit To: Jan Kiszka , kvm Return-path: Received: from mail-qc0-f171.google.com ([209.85.216.171]:38588 "EHLO mail-qc0-f171.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751336AbaBYK5Z (ORCPT ); Tue, 25 Feb 2014 05:57:25 -0500 Received: by mail-qc0-f171.google.com with SMTP id x3so279434qcv.30 for ; Tue, 25 Feb 2014 02:57:24 -0800 (PST) In-Reply-To: <530B8F92.50202@siemens.com> Sender: kvm-owner@vger.kernel.org List-ID: Il 24/02/2014 19:29, Jan Kiszka ha scritto: > Hi, > > I noticed that KVM (with VMX at least) enters an inifite loop of > vmentries and ept-violations when it has to set the accessed bit in a > guest page table that is in read-only memory (namely: the F-segment of > the BIOS). I don't think this is the proper reaction... > > Jan Thanks, I'll try to reproduce this. Does it work with shadow page tables? I'm asking because this commit wanted to fix something similar for the shadow page table case: commit ba6a3541545542721ce821d1e7e5ce35752e6fdf Author: Paolo Bonzini Date: Mon Sep 9 13:52:33 2013 +0200 KVM: mmu: allow page tables to be in read-only slots Page tables in a read-only memory slot will currently cause a triple fault because the page walker uses gfn_to_hva and it fails on such a slot. OVMF uses such a page table; however, real hardware seems to be fine with that as long as the accessed/dirty bits are set. Save whether the slot is readonly, and later check it when updating the accessed and dirty bits. Reviewed-by: Xiao Guangrong Reviewed-by: Gleb Natapov Signed-off-by: Paolo Bonzini even though OVMF sets the accessed/dirty bits so it's not exactly the same scenario. Note that NPT simply does not support this. Page tables must be writable in the NPT page tables, according to the AMD manual. Paolo