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Date: Wed, 26 Feb 2014 13:17:27 +0530
From: Kishon Vijay Abraham I <kishon@ti.com>
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To: Ajay Khandelwal <ajay.khandelwal@st.com>
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Subject: Re: [PATCH 2/2] PCI:designware:Fix iATU programming for cfg1, io
 and mem viewport
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On Wednesday 26 February 2014 12:01 PM, Ajay Khandelwal wrote:
> Hi Kishon,
> 
> On 2/21/2014 10:58 AM, Kishon Vijay Abraham I wrote:
>> Thanks for the patch. I have just burnt my PCIE-to-PCI bridge card :-s Will
>> test this once I get a new card.
> 
> were you able to solve issue in PCIE-to-PCI bridge.

oh yes. I was giving the total configuration space as 4k (2k for cfg0 and  2k
for cfg1). But there was some problem when I write 0x800 to
PCIE_ATU_LOWER_BASE. If I read back PCIE_ATU_LOWER_BASE after writing 0x800, it
has 0x0.

So I increased the configuration space to 8k (4k for cfg0 and  4k for cfg1).
With this I write 0x1000 to  PCIE_ATU_LOWER_BASE and able to enumerate devices
behind a PCIE-to-PCI bridge.
> 
> On SPEAr I see issues with PCIe to PCI bridge and PCIe to PCIe switch.
> 
> Imprecise external abort is generated, providing hook for abort(similar
> to imx6) solves this.

But this issue seems to be different :-s

Thanks
Kishon