From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/2] powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040
Date: Fri, 7 Mar 2014 15:05:00 -0800 [thread overview]
Message-ID: <531A509C.8020103@freescale.com> (raw)
In-Reply-To: <1391076598-15689-1-git-send-email-Priyanka.Jain@freescale.com>
On 01/30/2014 02:09 AM, Priyanka Jain wrote:
> T1040 SoC has SCFG (Supplement Configuration) Block which provides
> chip specific configuration and status support. The base address of
> SCFG block in T1040 is 0xfc000.
> SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register)
> at offset 0x28.
>
> Add definition of
> -SCFG block
> -SCFG_PIXCLKCR register
> -Bits definition of SCFG_PIXCLK register
>
> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
> ---
Applied to u-boot-mpc85xx/master. Thanks.
York
prev parent reply other threads:[~2014-03-07 23:05 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-01-30 10:09 [U-Boot] [PATCH 1/2] powerpc/mpc85xx: Add SCFG_PIXCLKCR register support for T1040 Priyanka Jain
2014-03-07 23:05 ` York Sun [this message]
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