From mboxrd@z Thu Jan  1 00:00:00 1970
From: York Sun <yorksun@freescale.com>
Date: Fri, 7 Mar 2014 15:05:00 -0800
Subject: [U-Boot] [PATCH 1/2] powerpc/mpc85xx: Add SCFG_PIXCLKCR
 register support for T1040
In-Reply-To: <1391076598-15689-1-git-send-email-Priyanka.Jain@freescale.com>
References: <1391076598-15689-1-git-send-email-Priyanka.Jain@freescale.com>
Message-ID: <531A509C.8020103@freescale.com>
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On 01/30/2014 02:09 AM, Priyanka Jain wrote:
> T1040 SoC has SCFG (Supplement Configuration) Block which provides
> chip specific configuration and status support. The base address of
> SCFG block in T1040 is 0xfc000.
> SCFG contains SCFG_PIXCLKCR (DIU pixel clock control register)
> at offset 0x28.
> 
> Add definition of
> -SCFG block
> -SCFG_PIXCLKCR register
> -Bits definition of SCFG_PIXCLK register
> 
> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
> ---

Applied to u-boot-mpc85xx/master. Thanks.

York