From mboxrd@z Thu Jan 1 00:00:00 1970 From: York Sun Date: Fri, 7 Mar 2014 15:05:56 -0800 Subject: [U-Boot] [PATCH][v2] powerpc/t104xrdb: Update DDR initialization related settings In-Reply-To: <1393387717-12345-1-git-send-email-Priyanka.Jain@freescale.com> References: <1393387717-12345-1-git-send-email-Priyanka.Jain@freescale.com> Message-ID: <531A50D4.1030902@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 02/25/2014 08:08 PM, Priyanka Jain wrote: > Update following DDR related settings for T1040RDB, T1042RDB_PI > -Correct number of chip selects to two as t1040 supports > two Chip selects. > -Update board_specific_parameters udimm structure with settings > derived via calibration. > -Update ddr_raw_timing sructure corresponding to DIMM. > -Set ODT to off. Typically on FSL board, ODT is set to 75 ohm, > but on T104xRDB, on setting this , DDR instability is observed. > Board-level debugging is in progress. > > Verified the updated settings to be working fine with dual-ranked > Micron, MT18KSF51272AZ-1G6 DIMM at data rate 1600MT/s. > > Signed-off-by: Priyanka Jain > Signed-off-by: York Sun > --- > Changes for v2: > Udpated description related to ODT off, Removed > cpo, write_data_delay, force_2t parameters as they > are not longer used. Applied to u-boot-mpc85xx/master. Thanks. York