diff for duplicates of <531D9E3A.7040109@arm.com> diff --git a/a/1.txt b/N1/1.txt index 4f73dce..9199ea7 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -13,15 +13,13 @@ On 07/03/14 06:14, Anshuman Khandual wrote: >>> Cc: Paul Mackerras <paulus@samba.org> >>> Cc: linuxppc-dev@lists.ozlabs.org >>> --- ->>> arch/powerpc/kernel/cacheinfo.c | 831 ++++++-------------------------= ---------- +>>> arch/powerpc/kernel/cacheinfo.c | 831 ++++++---------------------------------- >>> arch/powerpc/kernel/cacheinfo.h | 8 - >>> arch/powerpc/kernel/sysfs.c | 4 - >>> 3 files changed, 109 insertions(+), 734 deletions(-) >>> delete mode 100644 arch/powerpc/kernel/cacheinfo.h >>> ->>> diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cach= -einfo.c +>>> diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c >>> index 2912b87..05b7580 100644 >>> --- a/arch/powerpc/kernel/cacheinfo.c >>> +++ b/arch/powerpc/kernel/cacheinfo.c @@ -45,13 +43,12 @@ einfo.c >>> - >>> -/* per-cpu object for tracking: >>> - * - a "cache" kobject for the top-level directory ->>> - * - a list of "index" objects representing the cpu's local cache hier= -archy +>>> - * - a list of "index" objects representing the cpu's local cache hierarchy >>> - */ >>> -struct cache_dir { ->>> -=09struct kobject *kobj; /* bare (not embedded) kobject for cache ->>> -=09=09=09 * directory */ ->>> -=09struct cache_index_dir *index; /* list of index objects */ +>>> - struct kobject *kobj; /* bare (not embedded) kobject for cache +>>> - * directory */ +>>> - struct cache_index_dir *index; /* list of index objects */ >>> -}; >>> - >>> -/* "index" object: each cpu's cache directory has an index @@ -59,15 +56,15 @@ archy >>> - * cpu. This object's lifetime is managed via the embedded kobject. >>> - */ >>> -struct cache_index_dir { ->>> -=09struct kobject kobj; ->>> -=09struct cache_index_dir *next; /* next index in parent directory */ ->>> -=09struct cache *cache; +>>> - struct kobject kobj; +>>> - struct cache_index_dir *next; /* next index in parent directory */ +>>> - struct cache *cache; >>> -}; >>> >>> /* Template for determining which OF properties to query for a given >>> * cache type */ >>> @@ -60,11 +32,6 @@ struct cache_type_info { ->>> =09const char *nr_sets_prop; +>>> const char *nr_sets_prop; >>> }; >>> >>> -/* These are used to index the cache_type_info array. */ @@ -75,34 +72,33 @@ archy >>> -#define CACHE_TYPE_INSTRUCTION 1 >>> -#define CACHE_TYPE_DATA 2 >>> - ->>> static const struct cache_type_info cache_type_info[] =3D { ->>> =09{ ->>> =09=09/* PowerPC Processor binding says the [di]-cache-* ->>> @@ -77,246 +44,115 @@ static const struct cache_type_info cache_type_in= -fo[] =3D { ->>> =09=09.nr_sets_prop =3D "d-cache-sets", ->>> =09}, ->>> =09{ ->>> -=09=09.name =3D "Instruction", ->>> -=09=09.size_prop =3D "i-cache-size", ->>> -=09=09.line_size_props =3D { "i-cache-line-size", ->>> -=09=09=09=09 "i-cache-block-size", }, ->>> -=09=09.nr_sets_prop =3D "i-cache-sets", ->>> -=09}, ->>> -=09{ ->>> =09=09.name =3D "Data", ->>> =09=09.size_prop =3D "d-cache-size", ->>> =09=09.line_size_props =3D { "d-cache-line-size", ->>> =09=09=09=09 "d-cache-block-size", }, ->>> =09=09.nr_sets_prop =3D "d-cache-sets", ->>> =09}, ->>> +=09{ ->>> +=09=09.name =3D "Instruction", ->>> +=09=09.size_prop =3D "i-cache-size", ->>> +=09=09.line_size_props =3D { "i-cache-line-size", ->>> +=09=09=09=09 "i-cache-block-size", }, ->>> +=09=09.nr_sets_prop =3D "i-cache-sets", ->>> +=09}, +>>> static const struct cache_type_info cache_type_info[] = { +>>> { +>>> /* PowerPC Processor binding says the [di]-cache-* +>>> @@ -77,246 +44,115 @@ static const struct cache_type_info cache_type_info[] = { +>>> .nr_sets_prop = "d-cache-sets", +>>> }, +>>> { +>>> - .name = "Instruction", +>>> - .size_prop = "i-cache-size", +>>> - .line_size_props = { "i-cache-line-size", +>>> - "i-cache-block-size", }, +>>> - .nr_sets_prop = "i-cache-sets", +>>> - }, +>>> - { +>>> .name = "Data", +>>> .size_prop = "d-cache-size", +>>> .line_size_props = { "d-cache-line-size", +>>> "d-cache-block-size", }, +>>> .nr_sets_prop = "d-cache-sets", +>>> }, +>>> + { +>>> + .name = "Instruction", +>>> + .size_prop = "i-cache-size", +>>> + .line_size_props = { "i-cache-line-size", +>>> + "i-cache-block-size", }, +>>> + .nr_sets_prop = "i-cache-sets", +>>> + }, >>> }; >> >> @@ -110,32 +106,32 @@ fo[] =3D { >> >> After applying this patch, the cache_type_info array looks like this. >> ->> static const struct cache_type_info cache_type_info[] =3D { +>> static const struct cache_type_info cache_type_info[] = { >> { >> /* >> * PowerPC Processor binding says the [di]-cache-* >> * must be equal on unified caches, so just use >> * d-cache properties. >> */ ->> .name =3D "Unified", ->> .size_prop =3D "d-cache-size", ->> .line_size_props =3D { "d-cache-line-size", +>> .name = "Unified", +>> .size_prop = "d-cache-size", +>> .line_size_props = { "d-cache-line-size", >> "d-cache-block-size", }, ->> .nr_sets_prop =3D "d-cache-sets", +>> .nr_sets_prop = "d-cache-sets", >> }, >> { ->> .name =3D "Data", ->> .size_prop =3D "d-cache-size", ->> .line_size_props =3D { "d-cache-line-size", +>> .name = "Data", +>> .size_prop = "d-cache-size", +>> .line_size_props = { "d-cache-line-size", >> "d-cache-block-size", }, ->> .nr_sets_prop =3D "d-cache-sets", +>> .nr_sets_prop = "d-cache-sets", >> }, >> { ->> .name =3D "Instruction", ->> .size_prop =3D "i-cache-size", ->> .line_size_props =3D { "i-cache-line-size", +>> .name = "Instruction", +>> .size_prop = "i-cache-size", +>> .line_size_props = { "i-cache-line-size", >> "i-cache-block-size", }, ->> .nr_sets_prop =3D "i-cache-sets", +>> .nr_sets_prop = "i-cache-sets", >> }, >> }; >> @@ -144,7 +140,7 @@ fo[] =3D { >> >> static inline int get_cacheinfo_idx(enum cache_type type) >> { ->> if (type =3D=3D CACHE_TYPE_UNIFIED) +>> if (type == CACHE_TYPE_UNIFIED) >> return 0; >> else >> return type; @@ -153,11 +149,11 @@ fo[] =3D { >> These types are define in include/linux/cacheinfo.h as >> >> enum cache_type { ->> CACHE_TYPE_NOCACHE =3D 0, ->> CACHE_TYPE_INST =3D BIT(0),=09=09---> 1 ->> CACHE_TYPE_DATA =3D BIT(1),=09=09---> 2 ->> CACHE_TYPE_SEPARATE =3D CACHE_TYPE_INST | CACHE_TYPE_DATA, ->> CACHE_TYPE_UNIFIED =3D BIT(2), +>> CACHE_TYPE_NOCACHE = 0, +>> CACHE_TYPE_INST = BIT(0), ---> 1 +>> CACHE_TYPE_DATA = BIT(1), ---> 2 +>> CACHE_TYPE_SEPARATE = CACHE_TYPE_INST | CACHE_TYPE_DATA, +>> CACHE_TYPE_UNIFIED = BIT(2), >> }; >> >> When it is UNIFIED we return index 0, which is correct. But the index @@ -176,71 +172,61 @@ Thanks for taking time for testing and reviewing these patches. > > It does not work correctly on POWER. > -> The new patchset adds some more attributes for every cache entry apart fr= -om -> what we used to have on PowerPC before. From the ABI perspective, the old= - ones +> The new patchset adds some more attributes for every cache entry apart from +> what we used to have on PowerPC before. From the ABI perspective, the old ones > should reflect the correct value in the same manner as before. Looks like -> the generic code will make any attribute as "Unknown" if the arch code do= -es +> the generic code will make any attribute as "Unknown" if the arch code does > not populate them in the respective callback. > -Yes this is on my list, I need to avoid populating the sysfs files with=20 +Yes this is on my list, I need to avoid populating the sysfs files with "Unknown" as value, will do that in next version. > Here are some problems found on a POWER7 system > > (1) L1 instruction cache (cpu<N>/cache/index1/) > -> =09=3D=3D=3D=3D=3D=3D Before patch =3D=3D=3D=3D=3D=3D +> ====== Before patch ====== > -> =09coherency_line_size: =09128 -> =09level:=09=09=091 -> =09shared_cpu_map:=09=0900000000,00000000,00000000,00000000,00000000,0000= -0000,00000000,00000000,00000000, -> =09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0= -0000000,00000000,00000000, -> =09=09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0000000= -0,00000000,00000000, -> =09=09=09=0900000000,00000000,00000000,00000000,00000f00 -> =09size:=09=09=0932K -> =09type:=09=09=09Instruction +> coherency_line_size: 128 +> level: 1 +> shared_cpu_map: 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000, +> 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000, +> 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000, +> 00000000,00000000,00000000,00000000,00000f00 +> size: 32K +> type: Instruction > -> =09=3D=3D=3D=3D=3D After patch =3D=3D=3D=3D=3D=3D=3D=3D +> ===== After patch ======== > -> =09coherency_line_size:=09Unknown=09=09=09=09=09=09----> Wrong -> =09level:=09=09=091 -> =09shared_cpu_map:=09=0900000000,00000000,00000000,00000000,00000000,0000= -0000,00000000,00000000,00000000, -> =09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0= -0000000,00000000,00000000, -> =09=09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0000000= -0,00000000,00000000, -> =09=09=09=0900000000,00000000,00000000,00000000,00ffffff=09----> Wrong -> =09size:=09=09=090K=09=09=09=09=09=09----> Wrong -> =09type:=09=09=09Instruction=09 +> coherency_line_size: Unknown ----> Wrong +> level: 1 +> shared_cpu_map: 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000, +> 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000, +> 00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000, +> 00000000,00000000,00000000,00000000,00ffffff ----> Wrong +> size: 0K ----> Wrong +> type: Instruction > > (2) L3 cache (cpu<N>/cache/index3/) > -> =09=3D=3D=3D=3D=3D=3D Before patch =3D=3D=3D=3D=3D=3D +> ====== Before patch ====== > -> =09number_of_sets:=09=091 -> =09size:=09=09=094096K -> =09ways_of_associativity:=090 +> number_of_sets: 1 +> size: 4096K +> ways_of_associativity: 0 > -> =09=3D=3D=3D=3D=3D After patch =3D=3D=3D=3D=3D=3D=3D=3D +> ===== After patch ======== > -> =09number_of_sets:=09=091 -> =09size:=09=09=094096K -> =09ways_of_associativity:=09Unknown=09=09----> Wrong +> number_of_sets: 1 +> size: 4096K +> ways_of_associativity: Unknown ----> Wrong > -> Need to revisit this implementation on PowerPC and figure out the cause o= -f these problems. +> Need to revisit this implementation on PowerPC and figure out the cause of these problems. > -Yes, based on the logs you have provided, I will check for the root=20 -cause of these issues. I will get back with questions if I need=20 +Yes, based on the logs you have provided, I will check for the root +cause of these issues. I will get back with questions if I need clarifications. Regards, diff --git a/a/content_digest b/N1/content_digest index 6ceda02..8c634a4 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -6,10 +6,11 @@ "Subject\0Re: [PATCH RFC/RFT v3 6/9] powerpc: move cacheinfo sysfs to generic cacheinfo infrastructure\0" "Date\0Mon, 10 Mar 2014 11:12:58 +0000\0" "To\0Anshuman Khandual <khandual@linux.vnet.ibm.com>\0" - "Cc\0linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org>" - Paul Mackerras <paulus@samba.org> + "Cc\0Sudeep Holla <sudeep.holla@arm.com>" linux-kernel@vger.kernel.org <linux-kernel@vger.kernel.org> - " Sudeep Holla <sudeep.holla@arm.com>\0" + Benjamin Herrenschmidt <benh@kernel.crashing.org> + Paul Mackerras <paulus@samba.org> + " linuxppc-dev@lists.ozlabs.org <linuxppc-dev@lists.ozlabs.org>\0" "\00:1\0" "b\0" "Hi Anshuman,\n" @@ -27,15 +28,13 @@ ">>> Cc: Paul Mackerras <paulus@samba.org>\n" ">>> Cc: linuxppc-dev@lists.ozlabs.org\n" ">>> ---\n" - ">>> arch/powerpc/kernel/cacheinfo.c | 831 ++++++-------------------------=\n" - "---------\n" + ">>> arch/powerpc/kernel/cacheinfo.c | 831 ++++++----------------------------------\n" ">>> arch/powerpc/kernel/cacheinfo.h | 8 -\n" ">>> arch/powerpc/kernel/sysfs.c | 4 -\n" ">>> 3 files changed, 109 insertions(+), 734 deletions(-)\n" ">>> delete mode 100644 arch/powerpc/kernel/cacheinfo.h\n" ">>>\n" - ">>> diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cach=\n" - "einfo.c\n" + ">>> diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c\n" ">>> index 2912b87..05b7580 100644\n" ">>> --- a/arch/powerpc/kernel/cacheinfo.c\n" ">>> +++ b/arch/powerpc/kernel/cacheinfo.c\n" @@ -59,13 +58,12 @@ ">>> -\n" ">>> -/* per-cpu object for tracking:\n" ">>> - * - a \"cache\" kobject for the top-level directory\n" - ">>> - * - a list of \"index\" objects representing the cpu's local cache hier=\n" - "archy\n" + ">>> - * - a list of \"index\" objects representing the cpu's local cache hierarchy\n" ">>> - */\n" ">>> -struct cache_dir {\n" - ">>> -=09struct kobject *kobj; /* bare (not embedded) kobject for cache\n" - ">>> -=09=09=09 * directory */\n" - ">>> -=09struct cache_index_dir *index; /* list of index objects */\n" + ">>> -\tstruct kobject *kobj; /* bare (not embedded) kobject for cache\n" + ">>> -\t\t\t * directory */\n" + ">>> -\tstruct cache_index_dir *index; /* list of index objects */\n" ">>> -};\n" ">>> -\n" ">>> -/* \"index\" object: each cpu's cache directory has an index\n" @@ -73,15 +71,15 @@ ">>> - * cpu. This object's lifetime is managed via the embedded kobject.\n" ">>> - */\n" ">>> -struct cache_index_dir {\n" - ">>> -=09struct kobject kobj;\n" - ">>> -=09struct cache_index_dir *next; /* next index in parent directory */\n" - ">>> -=09struct cache *cache;\n" + ">>> -\tstruct kobject kobj;\n" + ">>> -\tstruct cache_index_dir *next; /* next index in parent directory */\n" + ">>> -\tstruct cache *cache;\n" ">>> -};\n" ">>>\n" ">>> /* Template for determining which OF properties to query for a given\n" ">>> * cache type */\n" ">>> @@ -60,11 +32,6 @@ struct cache_type_info {\n" - ">>> =09const char *nr_sets_prop;\n" + ">>> \tconst char *nr_sets_prop;\n" ">>> };\n" ">>>\n" ">>> -/* These are used to index the cache_type_info array. */\n" @@ -89,34 +87,33 @@ ">>> -#define CACHE_TYPE_INSTRUCTION 1\n" ">>> -#define CACHE_TYPE_DATA 2\n" ">>> -\n" - ">>> static const struct cache_type_info cache_type_info[] =3D {\n" - ">>> =09{\n" - ">>> =09=09/* PowerPC Processor binding says the [di]-cache-*\n" - ">>> @@ -77,246 +44,115 @@ static const struct cache_type_info cache_type_in=\n" - "fo[] =3D {\n" - ">>> =09=09.nr_sets_prop =3D \"d-cache-sets\",\n" - ">>> =09},\n" - ">>> =09{\n" - ">>> -=09=09.name =3D \"Instruction\",\n" - ">>> -=09=09.size_prop =3D \"i-cache-size\",\n" - ">>> -=09=09.line_size_props =3D { \"i-cache-line-size\",\n" - ">>> -=09=09=09=09 \"i-cache-block-size\", },\n" - ">>> -=09=09.nr_sets_prop =3D \"i-cache-sets\",\n" - ">>> -=09},\n" - ">>> -=09{\n" - ">>> =09=09.name =3D \"Data\",\n" - ">>> =09=09.size_prop =3D \"d-cache-size\",\n" - ">>> =09=09.line_size_props =3D { \"d-cache-line-size\",\n" - ">>> =09=09=09=09 \"d-cache-block-size\", },\n" - ">>> =09=09.nr_sets_prop =3D \"d-cache-sets\",\n" - ">>> =09},\n" - ">>> +=09{\n" - ">>> +=09=09.name =3D \"Instruction\",\n" - ">>> +=09=09.size_prop =3D \"i-cache-size\",\n" - ">>> +=09=09.line_size_props =3D { \"i-cache-line-size\",\n" - ">>> +=09=09=09=09 \"i-cache-block-size\", },\n" - ">>> +=09=09.nr_sets_prop =3D \"i-cache-sets\",\n" - ">>> +=09},\n" + ">>> static const struct cache_type_info cache_type_info[] = {\n" + ">>> \t{\n" + ">>> \t\t/* PowerPC Processor binding says the [di]-cache-*\n" + ">>> @@ -77,246 +44,115 @@ static const struct cache_type_info cache_type_info[] = {\n" + ">>> \t\t.nr_sets_prop = \"d-cache-sets\",\n" + ">>> \t},\n" + ">>> \t{\n" + ">>> -\t\t.name = \"Instruction\",\n" + ">>> -\t\t.size_prop = \"i-cache-size\",\n" + ">>> -\t\t.line_size_props = { \"i-cache-line-size\",\n" + ">>> -\t\t\t\t \"i-cache-block-size\", },\n" + ">>> -\t\t.nr_sets_prop = \"i-cache-sets\",\n" + ">>> -\t},\n" + ">>> -\t{\n" + ">>> \t\t.name = \"Data\",\n" + ">>> \t\t.size_prop = \"d-cache-size\",\n" + ">>> \t\t.line_size_props = { \"d-cache-line-size\",\n" + ">>> \t\t\t\t \"d-cache-block-size\", },\n" + ">>> \t\t.nr_sets_prop = \"d-cache-sets\",\n" + ">>> \t},\n" + ">>> +\t{\n" + ">>> +\t\t.name = \"Instruction\",\n" + ">>> +\t\t.size_prop = \"i-cache-size\",\n" + ">>> +\t\t.line_size_props = { \"i-cache-line-size\",\n" + ">>> +\t\t\t\t \"i-cache-block-size\", },\n" + ">>> +\t\t.nr_sets_prop = \"i-cache-sets\",\n" + ">>> +\t},\n" ">>> };\n" ">>\n" ">>\n" @@ -124,32 +121,32 @@ ">>\n" ">> After applying this patch, the cache_type_info array looks like this.\n" ">>\n" - ">> static const struct cache_type_info cache_type_info[] =3D {\n" + ">> static const struct cache_type_info cache_type_info[] = {\n" ">> {\n" ">> /*\n" ">> * PowerPC Processor binding says the [di]-cache-*\n" ">> * must be equal on unified caches, so just use\n" ">> * d-cache properties.\n" ">> */\n" - ">> .name =3D \"Unified\",\n" - ">> .size_prop =3D \"d-cache-size\",\n" - ">> .line_size_props =3D { \"d-cache-line-size\",\n" + ">> .name = \"Unified\",\n" + ">> .size_prop = \"d-cache-size\",\n" + ">> .line_size_props = { \"d-cache-line-size\",\n" ">> \"d-cache-block-size\", },\n" - ">> .nr_sets_prop =3D \"d-cache-sets\",\n" + ">> .nr_sets_prop = \"d-cache-sets\",\n" ">> },\n" ">> {\n" - ">> .name =3D \"Data\",\n" - ">> .size_prop =3D \"d-cache-size\",\n" - ">> .line_size_props =3D { \"d-cache-line-size\",\n" + ">> .name = \"Data\",\n" + ">> .size_prop = \"d-cache-size\",\n" + ">> .line_size_props = { \"d-cache-line-size\",\n" ">> \"d-cache-block-size\", },\n" - ">> .nr_sets_prop =3D \"d-cache-sets\",\n" + ">> .nr_sets_prop = \"d-cache-sets\",\n" ">> },\n" ">> {\n" - ">> .name =3D \"Instruction\",\n" - ">> .size_prop =3D \"i-cache-size\",\n" - ">> .line_size_props =3D { \"i-cache-line-size\",\n" + ">> .name = \"Instruction\",\n" + ">> .size_prop = \"i-cache-size\",\n" + ">> .line_size_props = { \"i-cache-line-size\",\n" ">> \"i-cache-block-size\", },\n" - ">> .nr_sets_prop =3D \"i-cache-sets\",\n" + ">> .nr_sets_prop = \"i-cache-sets\",\n" ">> },\n" ">> };\n" ">>\n" @@ -158,7 +155,7 @@ ">>\n" ">> static inline int get_cacheinfo_idx(enum cache_type type)\n" ">> {\n" - ">> if (type =3D=3D CACHE_TYPE_UNIFIED)\n" + ">> if (type == CACHE_TYPE_UNIFIED)\n" ">> return 0;\n" ">> else\n" ">> return type;\n" @@ -167,11 +164,11 @@ ">> These types are define in include/linux/cacheinfo.h as\n" ">>\n" ">> enum cache_type {\n" - ">> CACHE_TYPE_NOCACHE =3D 0,\n" - ">> CACHE_TYPE_INST =3D BIT(0),=09=09---> 1\n" - ">> CACHE_TYPE_DATA =3D BIT(1),=09=09---> 2\n" - ">> CACHE_TYPE_SEPARATE =3D CACHE_TYPE_INST | CACHE_TYPE_DATA,\n" - ">> CACHE_TYPE_UNIFIED =3D BIT(2),\n" + ">> CACHE_TYPE_NOCACHE = 0,\n" + ">> CACHE_TYPE_INST = BIT(0),\t\t---> 1\n" + ">> CACHE_TYPE_DATA = BIT(1),\t\t---> 2\n" + ">> CACHE_TYPE_SEPARATE = CACHE_TYPE_INST | CACHE_TYPE_DATA,\n" + ">> CACHE_TYPE_UNIFIED = BIT(2),\n" ">> };\n" ">>\n" ">> When it is UNIFIED we return index 0, which is correct. But the index\n" @@ -190,74 +187,64 @@ ">\n" "> It does not work correctly on POWER.\n" ">\n" - "> The new patchset adds some more attributes for every cache entry apart fr=\n" - "om\n" - "> what we used to have on PowerPC before. From the ABI perspective, the old=\n" - " ones\n" + "> The new patchset adds some more attributes for every cache entry apart from\n" + "> what we used to have on PowerPC before. From the ABI perspective, the old ones\n" "> should reflect the correct value in the same manner as before. Looks like\n" - "> the generic code will make any attribute as \"Unknown\" if the arch code do=\n" - "es\n" + "> the generic code will make any attribute as \"Unknown\" if the arch code does\n" "> not populate them in the respective callback.\n" ">\n" "\n" - "Yes this is on my list, I need to avoid populating the sysfs files with=20\n" + "Yes this is on my list, I need to avoid populating the sysfs files with \n" "\"Unknown\" as value, will do that in next version.\n" "\n" "> Here are some problems found on a POWER7 system\n" ">\n" "> (1) L1 instruction cache (cpu<N>/cache/index1/)\n" ">\n" - "> =09=3D=3D=3D=3D=3D=3D Before patch =3D=3D=3D=3D=3D=3D\n" + "> \t====== Before patch ======\n" ">\n" - "> =09coherency_line_size: =09128\n" - "> =09level:=09=09=091\n" - "> =09shared_cpu_map:=09=0900000000,00000000,00000000,00000000,00000000,0000=\n" - "0000,00000000,00000000,00000000,\n" - "> =09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0=\n" - "0000000,00000000,00000000,\n" - "> =09=09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0000000=\n" - "0,00000000,00000000,\n" - "> =09=09=09=0900000000,00000000,00000000,00000000,00000f00\n" - "> =09size:=09=09=0932K\n" - "> =09type:=09=09=09Instruction\n" + "> \tcoherency_line_size: \t128\n" + "> \tlevel:\t\t\t1\n" + "> \tshared_cpu_map:\t\t00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,\n" + "> \t\t\t00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,\n" + "> \t\t\t\t00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,\n" + "> \t\t\t\t00000000,00000000,00000000,00000000,00000f00\n" + "> \tsize:\t\t\t32K\n" + "> \ttype:\t\t\tInstruction\n" ">\n" - "> =09=3D=3D=3D=3D=3D After patch =3D=3D=3D=3D=3D=3D=3D=3D\n" + "> \t===== After patch ========\n" ">\n" - "> =09coherency_line_size:=09Unknown=09=09=09=09=09=09----> Wrong\n" - "> =09level:=09=09=091\n" - "> =09shared_cpu_map:=09=0900000000,00000000,00000000,00000000,00000000,0000=\n" - "0000,00000000,00000000,00000000,\n" - "> =09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0=\n" - "0000000,00000000,00000000,\n" - "> =09=09=09=0900000000,00000000,00000000,00000000,00000000,00000000,0000000=\n" - "0,00000000,00000000,\n" - "> =09=09=09=0900000000,00000000,00000000,00000000,00ffffff=09----> Wrong\n" - "> =09size:=09=09=090K=09=09=09=09=09=09----> Wrong\n" - "> =09type:=09=09=09Instruction=09\n" + "> \tcoherency_line_size:\tUnknown\t\t\t\t\t\t----> Wrong\n" + "> \tlevel:\t\t\t1\n" + "> \tshared_cpu_map:\t\t00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,\n" + "> \t\t\t00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,\n" + "> \t\t\t\t00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,00000000,\n" + "> \t\t\t\t00000000,00000000,00000000,00000000,00ffffff\t----> Wrong\n" + "> \tsize:\t\t\t0K\t\t\t\t\t\t----> Wrong\n" + "> \ttype:\t\t\tInstruction\t\n" ">\n" "> (2) L3 cache (cpu<N>/cache/index3/)\n" ">\n" - "> =09=3D=3D=3D=3D=3D=3D Before patch =3D=3D=3D=3D=3D=3D\n" + "> \t====== Before patch ======\n" ">\n" - "> =09number_of_sets:=09=091\n" - "> =09size:=09=09=094096K\n" - "> =09ways_of_associativity:=090\n" + "> \tnumber_of_sets:\t\t1\n" + "> \tsize:\t\t\t4096K\n" + "> \tways_of_associativity:\t0\n" ">\n" - "> =09=3D=3D=3D=3D=3D After patch =3D=3D=3D=3D=3D=3D=3D=3D\n" + "> \t===== After patch ========\n" ">\n" - "> =09number_of_sets:=09=091\n" - "> =09size:=09=09=094096K\n" - "> =09ways_of_associativity:=09Unknown=09=09----> Wrong\n" + "> \tnumber_of_sets:\t\t1\n" + "> \tsize:\t\t\t4096K\n" + "> \tways_of_associativity:\tUnknown\t\t----> Wrong\n" ">\n" - "> Need to revisit this implementation on PowerPC and figure out the cause o=\n" - "f these problems.\n" + "> Need to revisit this implementation on PowerPC and figure out the cause of these problems.\n" ">\n" "\n" - "Yes, based on the logs you have provided, I will check for the root=20\n" - "cause of these issues. I will get back with questions if I need=20\n" + "Yes, based on the logs you have provided, I will check for the root \n" + "cause of these issues. I will get back with questions if I need \n" "clarifications.\n" "\n" "Regards,\n" Sudeep -d54a321b67260b2f5d2407caacdbbac7876048b448cebba8e7169cbbbab96c3b +b138eb5eb0d74ecc642269dfdc8f49e9e9831555716e83e759de43162a2298f8
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