From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WNutQ-00049I-Bj for qemu-devel@nongnu.org; Wed, 12 Mar 2014 21:57:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WNutJ-0002Oy-PX for qemu-devel@nongnu.org; Wed, 12 Mar 2014 21:57:08 -0400 Message-ID: <5321106B.1020908@suse.de> Date: Thu, 13 Mar 2014 02:56:59 +0100 From: =?ISO-8859-15?Q?Andreas_F=E4rber?= MIME-Version: 1.0 References: <1385006938-32515-1-git-send-email-aik@ozlabs.ru> <1385006938-32515-3-git-send-email-aik@ozlabs.ru> In-Reply-To: <1385006938-32515-3-git-send-email-aik@ozlabs.ru> Content-Type: text/plain; charset=ISO-8859-15 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH 2/4] spapr-pci: introduce a finish_realize() callback List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexey Kardashevskiy , qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Alexander Graf Am 21.11.2013 05:08, schrieb Alexey Kardashevskiy: > The spapr-pci PHB initializes IOMMU for emulataed devices only. "emulated" > The upcoming VFIO support will do it different. However both emulated > and VFIO PHB types share most of the initialization code. > For the type specific things a new finish_realize() callback is > introduced. >=20 > This introduces sPAPRPHBClass derived from PCIHostBridgeClass and > adds the callback pointer. >=20 > This implements finish_realize() for emulated devices. >=20 > This changes initialization steps order to have the finish_realize() > call at the end of the spapr_finalize(). >=20 > Signed-off-by: Alexey Kardashevskiy > --- > Changes: > v5: > * this is a new patch in the series, it was a part of a previous patch > --- > hw/ppc/spapr_pci.c | 46 +++++++++++++++++++++++++++++--------= -------- > include/hw/pci-host/spapr.h | 18 ++++++++++++++++-- > 2 files changed, 46 insertions(+), 18 deletions(-) >=20 > diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c > index aeb012d..963841c 100644 > --- a/hw/ppc/spapr_pci.c > +++ b/hw/ppc/spapr_pci.c > @@ -500,6 +500,7 @@ static void spapr_phb_realize(DeviceState *dev, Err= or **errp) > SysBusDevice *s =3D SYS_BUS_DEVICE(dev); > sPAPRPHBState *sphb =3D SPAPR_PCI_HOST_BRIDGE(s); > PCIHostState *phb =3D PCI_HOST_BRIDGE(s); > + sPAPRPHBClass *info =3D SPAPR_PCI_HOST_BRIDGE_GET_CLASS(s); > const char *busname; > char *namebuf; > int i; > @@ -609,22 +610,6 @@ static void spapr_phb_realize(DeviceState *dev, Er= ror **errp) > PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS= ); > phb->bus =3D bus; > =20 > - sphb->dma_window_start =3D 0; > - sphb->dma_window_size =3D 0x40000000; > - sphb->tcet =3D spapr_tce_new_table(dev, sphb->dma_liobn, > - sphb->dma_window_size); > - if (!sphb->tcet) { > - error_setg(errp, "Unable to create TCE table for %s", > - sphb->dtbusname); > - return; > - } > - address_space_init(&sphb->iommu_as, spapr_tce_get_iommu(sphb->tcet= ), > - sphb->dtbusname); > - > - pci_setup_iommu(bus, spapr_pci_dma_iommu, sphb); > - > - pci_bus_set_route_irq_fn(bus, spapr_route_intx_pin_to_irq); > - > QLIST_INSERT_HEAD(&spapr->phbs, sphb, list); > =20 > /* Initialize the LSI table */ > @@ -639,6 +624,32 @@ static void spapr_phb_realize(DeviceState *dev, Er= ror **errp) > =20 > sphb->lsi_table[i].irq =3D irq; > } > + > + pci_setup_iommu(sphb->parent_obj.bus, spapr_pci_dma_iommu, sphb); Accessing ->parent_obj anywhere but in VMState is very likely wrong, here it is definitely. Also due to time pressure I'm not comfortable taking this into 2.0-rc0 and would like to see how this works for the second implementation. Regards, Andreas > + > + pci_bus_set_route_irq_fn(bus, spapr_route_intx_pin_to_irq); > + > + if (!info->finish_realize) { > + error_setg(errp, "finish_realize not defined"); > + return; > + } > + > + info->finish_realize(sphb, errp); > +} > + > +static void spapr_phb_finish_realize(sPAPRPHBState *sphb, Error **errp= ) > +{ > + sphb->dma_window_start =3D 0; > + sphb->dma_window_size =3D 0x40000000; > + sphb->tcet =3D spapr_tce_new_table(DEVICE(sphb), sphb->dma_liobn, > + sphb->dma_window_size); > + if (!sphb->tcet) { > + error_setg(errp, "Unable to create TCE table for %s", > + sphb->dtbusname); > + return ; > + } > + address_space_init(&sphb->iommu_as, spapr_tce_get_iommu(sphb->tcet= ), > + sphb->dtbusname); > } > =20 > static void spapr_phb_reset(DeviceState *qdev) > @@ -722,12 +733,14 @@ static void spapr_phb_class_init(ObjectClass *kla= ss, void *data) > { > PCIHostBridgeClass *hc =3D PCI_HOST_BRIDGE_CLASS(klass); > DeviceClass *dc =3D DEVICE_CLASS(klass); > + sPAPRPHBClass *spc =3D SPAPR_PCI_HOST_BRIDGE_CLASS(klass); > =20 > hc->root_bus_path =3D spapr_phb_root_bus_path; > dc->realize =3D spapr_phb_realize; > dc->props =3D spapr_phb_properties; > dc->reset =3D spapr_phb_reset; > dc->vmsd =3D &vmstate_spapr_pci; > + spc->finish_realize =3D spapr_phb_finish_realize; > } > =20 > static const TypeInfo spapr_phb_info =3D { > @@ -735,6 +748,7 @@ static const TypeInfo spapr_phb_info =3D { > .parent =3D TYPE_PCI_HOST_BRIDGE, > .instance_size =3D sizeof(sPAPRPHBState), > .class_init =3D spapr_phb_class_init, > + .class_size =3D sizeof(sPAPRPHBClass), > }; > =20 > PCIHostState *spapr_create_phb(sPAPREnvironment *spapr, int index) > diff --git a/include/hw/pci-host/spapr.h b/include/hw/pci-host/spapr.h > index 970b4a9..0f428a1 100644 > --- a/include/hw/pci-host/spapr.h > +++ b/include/hw/pci-host/spapr.h > @@ -34,7 +34,21 @@ > #define SPAPR_PCI_HOST_BRIDGE(obj) \ > OBJECT_CHECK(sPAPRPHBState, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE) > =20 > -typedef struct sPAPRPHBState { > +#define SPAPR_PCI_HOST_BRIDGE_CLASS(klass) \ > + OBJECT_CLASS_CHECK(sPAPRPHBClass, (klass), TYPE_SPAPR_PCI_HOST_BR= IDGE) > +#define SPAPR_PCI_HOST_BRIDGE_GET_CLASS(obj) \ > + OBJECT_GET_CLASS(sPAPRPHBClass, (obj), TYPE_SPAPR_PCI_HOST_BRIDGE= ) > + > +typedef struct sPAPRPHBClass sPAPRPHBClass; > +typedef struct sPAPRPHBState sPAPRPHBState; > + > +struct sPAPRPHBClass { > + PCIHostBridgeClass parent_class; > + > + void (*finish_realize)(sPAPRPHBState *sphb, Error **errp); > +}; > + > +struct sPAPRPHBState { > PCIHostState parent_obj; > =20 > int32_t index; > @@ -62,7 +76,7 @@ typedef struct sPAPRPHBState { > } msi_table[SPAPR_MSIX_MAX_DEVS]; > =20 > QLIST_ENTRY(sPAPRPHBState) list; > -} sPAPRPHBState; > +}; > =20 > #define SPAPR_PCI_BASE_BUID 0x800000020000000ULL > =20 >=20 --=20 SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 N=FCrnberg, Germany GF: Jeff Hawn, Jennifer Guild, Felix Imend=F6rffer; HRB 16746 AG N=FCrnbe= rg