diff for duplicates of <532182EB.7090002@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 9a8f5bb..82dba44 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ -On 03/12/2014 11:06 AM, Antoine T?nart wrote: -> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com> +On 03/12/2014 11:06 AM, Antoine Ténart wrote: +> Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- @@ -13,7 +13,7 @@ Missed some comments on the nodes below. > +++ b/arch/arm/boot/dts/berlin2q.dtsi > @@ -0,0 +1,167 @@ > +/* -> + * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com> +> + * Copyright (C) 2014 Antoine Ténart <antoine.tenart@free-electrons.com> > + * > + * This file is licensed under the terms of the GNU General Public > + * License version 2. This program is licensed "as is" without any @@ -32,28 +32,28 @@ Missed some comments on the nodes below. > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu at 0 { +> + cpu@0 { > + compatible = "arm,cortex-a9"; > + device_type = "cpu"; > + next-level-cache = <&l2>; > + reg = <0>; > + }; > + -> + cpu at 1 { +> + cpu@1 { > + compatible = "arm,cortex-a9"; > + device_type = "cpu"; > + next-level-cache = <&l2>; > + reg = <1>; > + }; > + -> + cpu at 2 { +> + cpu@2 { > + compatible = "arm,cortex-a9"; > + device_type = "cpu"; > + next-level-cache = <&l2>; > + reg = <2>; > + }; > + -> + cpu at 3 { +> + cpu@3 { > + compatible = "arm,cortex-a9"; > + device_type = "cpu"; > + next-level-cache = <&l2>; @@ -94,20 +94,20 @@ then? > + ranges = <0 0xf7000000 0x1000000>; > + interrupt-parent = <&gic>; > + -> + l2: l2-cache-controller at ac0000 { +> + l2: l2-cache-controller@ac0000 { > + compatible = "arm,pl310-cache"; > + reg = <0xac0000 0x1000>; > + cache-level = <2>; > + }; > + -> + gic: interrupt-controller at ad1000 { +> + gic: interrupt-controller@ad1000 { > + compatible = "arm,cortex-a9-gic"; > + reg = <0xad1000 0x1000>, <0xad0100 0x100>; > + interrupt-controller; > + #interrupt-cells = <3>; > + }; > + -> + local-timer at ad0600 { +> + local-timer@ad0600 { Please keep nodes sorted by address. @@ -123,7 +123,7 @@ for berlin2q local-timer also runs at sysclk/n? > + status = "okay"; > + }; > + -> + apb at e80000 { +> + apb@e80000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; @@ -131,7 +131,7 @@ for berlin2q local-timer also runs at sysclk/n? > + ranges = <0 0xe80000 0x10000>; > + interrupt-parent = <&aic>; > + -> + timer0: timer at 2c00 { +> + timer0: timer@2c00 { > + compatible = "snps,dw-apb-timer"; > + reg = <0x2c00 0x14>; > + interrupts = <8>; @@ -139,7 +139,7 @@ for berlin2q local-timer also runs at sysclk/n? > + status = "okay"; > + }; > + -> + timer1: timer at 2c14 { +> + timer1: timer@2c14 { > + compatible = "snps,dw-apb-timer"; > + reg = <0x2c14 0x14>; > + clock-freq = <100000000>; @@ -149,7 +149,7 @@ for berlin2q local-timer also runs at sysclk/n? berlin2/berlin2cd have a vast amount of 8 apb timers. Any timers missing here or did Marvell remove them? -> + aic: interrupt-controller at 3800 { +> + aic: interrupt-controller@3800 { > + compatible = "snps,dw-apb-ictl"; > + reg = <0x3800 0x30>; > + interrupt-controller; @@ -159,7 +159,7 @@ here or did Marvell remove them? > + }; > + }; > + -> + apb at fc0000 { +> + apb@fc0000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; @@ -167,7 +167,7 @@ here or did Marvell remove them? > + ranges = <0 0xfc0000 0x10000>; > + interrupt-parent = <&sic>; > + -> + uart0: uart at 9000 { +> + uart0: uart@9000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x9000 0x100>; > + interrupt-parent = <&sic>; @@ -177,7 +177,7 @@ here or did Marvell remove them? > + status = "disabled"; > + }; > + -> + uart1: uart at a000 { +> + uart1: uart@a000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0xa000 0x100>; > + interrupt-parent = <&sic>; @@ -191,7 +191,7 @@ Also for uart, can you please double-check if there is no uart2? Sebastian -> + sic: interrupt-controller at e000 { +> + sic: interrupt-controller@e000 { > + compatible = "snps,dw-apb-ictl"; > + reg = <0xe000 0x30>; > + interrupt-controller; diff --git a/a/content_digest b/N1/content_digest index 8082dd8..caa928d 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,13 +1,18 @@ "ref\01394622364-6848-1-git-send-email-antoine.tenart@free-electrons.com\0" "ref\01394622364-6848-2-git-send-email-antoine.tenart@free-electrons.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH 1/2] ARM: dts: berlin2q: add the Marvell Armada 1500 pro (BG2Q) device tree\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH 1/2] ARM: dts: berlin2q: add the Marvell Armada 1500 pro (BG2Q) device tree\0" "Date\0Thu, 13 Mar 2014 10:05:31 +0000\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Antoine T\303\251nart <antoine.tenart@free-electrons.com>\0" + "Cc\0alexandre.belloni@free-electrons.com" + zmxu@marvell.com + jszhang@marvell.com + linux-arm-kernel@lists.infradead.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" - "On 03/12/2014 11:06 AM, Antoine T?nart wrote:\n" - "> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>\n" + "On 03/12/2014 11:06 AM, Antoine T\303\251nart wrote:\n" + "> Signed-off-by: Antoine T\303\251nart <antoine.tenart@free-electrons.com>\n" "> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>\n" "> ---\n" "\n" @@ -21,7 +26,7 @@ "> +++ b/arch/arm/boot/dts/berlin2q.dtsi\n" "> @@ -0,0 +1,167 @@\n" "> +/*\n" - "> + * Copyright (C) 2014 Antoine T?nart <antoine.tenart@free-electrons.com>\n" + "> + * Copyright (C) 2014 Antoine T\303\251nart <antoine.tenart@free-electrons.com>\n" "> + *\n" "> + * This file is licensed under the terms of the GNU General Public\n" "> + * License version 2. This program is licensed \"as is\" without any\n" @@ -40,28 +45,28 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu at 0 {\n" + "> +\t\tcpu@0 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tnext-level-cache = <&l2>;\n" "> +\t\t\treg = <0>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu at 1 {\n" + "> +\t\tcpu@1 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tnext-level-cache = <&l2>;\n" "> +\t\t\treg = <1>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu at 2 {\n" + "> +\t\tcpu@2 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tnext-level-cache = <&l2>;\n" "> +\t\t\treg = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu at 3 {\n" + "> +\t\tcpu@3 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9\";\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tnext-level-cache = <&l2>;\n" @@ -102,20 +107,20 @@ "> +\t\tranges = <0 0xf7000000 0x1000000>;\n" "> +\t\tinterrupt-parent = <&gic>;\n" "> +\n" - "> +\t\tl2: l2-cache-controller at ac0000 {\n" + "> +\t\tl2: l2-cache-controller@ac0000 {\n" "> +\t\t\tcompatible = \"arm,pl310-cache\";\n" "> +\t\t\treg = <0xac0000 0x1000>;\n" "> +\t\t\tcache-level = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgic: interrupt-controller at ad1000 {\n" + "> +\t\tgic: interrupt-controller@ad1000 {\n" "> +\t\t\tcompatible = \"arm,cortex-a9-gic\";\n" "> +\t\t\treg = <0xad1000 0x1000>, <0xad0100 0x100>;\n" "> +\t\t\tinterrupt-controller;\n" "> +\t\t\t#interrupt-cells = <3>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tlocal-timer at ad0600 {\n" + "> +\t\tlocal-timer@ad0600 {\n" "\n" "Please keep nodes sorted by address.\n" "\n" @@ -131,7 +136,7 @@ "> +\t\t\tstatus = \"okay\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb at e80000 {\n" + "> +\t\tapb@e80000 {\n" "> +\t\t\tcompatible = \"simple-bus\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <1>;\n" @@ -139,7 +144,7 @@ "> +\t\t\tranges = <0 0xe80000 0x10000>;\n" "> +\t\t\tinterrupt-parent = <&aic>;\n" "> +\n" - "> +\t\t\ttimer0: timer at 2c00 {\n" + "> +\t\t\ttimer0: timer@2c00 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-timer\";\n" "> +\t\t\t\treg = <0x2c00 0x14>;\n" "> +\t\t\t\tinterrupts = <8>;\n" @@ -147,7 +152,7 @@ "> +\t\t\t\tstatus = \"okay\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\ttimer1: timer at 2c14 {\n" + "> +\t\t\ttimer1: timer@2c14 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-timer\";\n" "> +\t\t\t\treg = <0x2c14 0x14>;\n" "> +\t\t\t\tclock-freq = <100000000>;\n" @@ -157,7 +162,7 @@ "berlin2/berlin2cd have a vast amount of 8 apb timers. Any timers missing\n" "here or did Marvell remove them?\n" "\n" - "> +\t\t\taic: interrupt-controller at 3800 {\n" + "> +\t\t\taic: interrupt-controller@3800 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-ictl\";\n" "> +\t\t\t\treg = <0x3800 0x30>;\n" "> +\t\t\t\tinterrupt-controller;\n" @@ -167,7 +172,7 @@ "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\tapb at fc0000 {\n" + "> +\t\tapb@fc0000 {\n" "> +\t\t\tcompatible = \"simple-bus\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <1>;\n" @@ -175,7 +180,7 @@ "> +\t\t\tranges = <0 0xfc0000 0x10000>;\n" "> +\t\t\tinterrupt-parent = <&sic>;\n" "> +\n" - "> +\t\t\tuart0: uart at 9000 {\n" + "> +\t\t\tuart0: uart@9000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x9000 0x100>;\n" "> +\t\t\t\tinterrupt-parent = <&sic>;\n" @@ -185,7 +190,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart1: uart at a000 {\n" + "> +\t\t\tuart1: uart@a000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0xa000 0x100>;\n" "> +\t\t\t\tinterrupt-parent = <&sic>;\n" @@ -199,7 +204,7 @@ "\n" "Sebastian\n" "\n" - "> +\t\t\tsic: interrupt-controller at e000 {\n" + "> +\t\t\tsic: interrupt-controller@e000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-ictl\";\n" "> +\t\t\t\treg = <0xe000 0x30>;\n" "> +\t\t\t\tinterrupt-controller;\n" @@ -212,4 +217,4 @@ "> +};\n" > -7f9c5ced40a006fae0b579e7fcb2dc26a62a04cd94d305da8b680eee66cf117f +9533b17002505616a53bcc8cabefd001e867128aba4ee5447f4ea6153dc7974f
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