From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: "Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
patches@linaro.org, "Michael Matz" <matz@suse.de>,
"Alexander Graf" <agraf@suse.de>,
"Will Newton" <will.newton@linaro.org>,
"Dirk Mueller" <dmueller@suse.de>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
kvmarm@lists.cs.columbia.edu,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v2 00/25] A64: Neon patches, sixth set
Date: Fri, 14 Mar 2014 16:21:50 -0700 [thread overview]
Message-ID: <53238F0E.4070608@twiddle.net> (raw)
In-Reply-To: <1394822294-14837-1-git-send-email-peter.maydell@linaro.org>
On 03/14/2014 11:37 AM, Peter Maydell wrote:
> Alex Bennée (11):
> target-arm: A64: Fix bug in add_sub_ext handling of rn
> target-arm: A64: Add last AdvSIMD Integer to FP ops
> target-arm: A64: Add FSQRT to C3.6.17 (two misc)
> target-arm: A64: Add remaining CLS/Z vector ops
> target-arm: A64: Saturating and narrowing shift ops
> target-arm: A64: Add FRECPX (reciprocal exponent)
> softfloat: export squash_input_denormal functions
> target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE,
> FRECPE
> target-arm: A64: Move handle_2misc_narrow function
> target-arm: A64: Implement scalar saturating narrow ops
> target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate)
>
> Peter Maydell (14):
> target-arm: A64: Implement PMULL instruction
> target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP
> target-arm: A64: Implement SHLL, SHLL2
> target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions
> target-arm: A64: Implement FCVTN
> target-arm: A64: Implement FCVTL
> target-arm: A64: List unsupported shift-imm opcodes
> target-arm: A64: Implement SRI
> target-arm: A64: Implement FRINT*
> exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder
> target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL
> target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
> target-arm: A64: Implement FCVTXN
> scripts/qemu-binfmt-conf.sh: Add AArch64 registration
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
prev parent reply other threads:[~2014-03-14 23:22 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-14 18:37 [Qemu-devel] [PATCH v2 00/25] A64: Neon patches, sixth set Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 01/25] target-arm: A64: Implement PMULL instruction Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 02/25] target-arm: A64: Fix bug in add_sub_ext handling of rn Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 03/25] target-arm: A64: Add last AdvSIMD Integer to FP ops Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 04/25] target-arm: A64: Add FSQRT to C3.6.17 (two misc) Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 05/25] target-arm: A64: Add remaining CLS/Z vector ops Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 06/25] target-arm: A64: Saturating and narrowing shift ops Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 07/25] target-arm: A64: Implement SADDLP, UADDLP, SADALP, UADALP Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 08/25] target-arm: A64: Implement SHLL, SHLL2 Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 09/25] target-arm: A64: Implement FCVT[NMAPZ][SU] SIMD instructions Peter Maydell
2014-03-14 18:37 ` [Qemu-devel] [PATCH v2 10/25] target-arm: A64: Implement FCVTN Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 11/25] target-arm: A64: Implement FCVTL Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 12/25] target-arm: A64: List unsupported shift-imm opcodes Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 13/25] target-arm: A64: Add FRECPX (reciprocal exponent) Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 14/25] target-arm: A64: Implement SRI Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 15/25] target-arm: A64: Implement FRINT* Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 16/25] exec-all.h: Increase MAX_OP_PER_INSTR for ARM A64 decoder Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 17/25] target-arm: A64: Handle saturating left shifts SQSHL, SQSHLU, UQSHL Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 18/25] target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 19/25] softfloat: export squash_input_denormal functions Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 20/25] target-arm: A64: Implement AdvSIMD reciprocal estimate insns URECPE, FRECPE Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 21/25] target-arm: A64: Move handle_2misc_narrow function Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 22/25] target-arm: A64: Implement scalar saturating narrow ops Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 23/25] target-arm: A64: Implement FCVTXN Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 24/25] target-arm: A64: Add [UF]RSQRTE (reciprocal root estimate) Peter Maydell
2014-03-14 18:38 ` [Qemu-devel] [PATCH v2 25/25] scripts/qemu-binfmt-conf.sh: Add AArch64 registration Peter Maydell
2014-03-14 23:21 ` Richard Henderson [this message]
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