diff for duplicates of <53298D9F.7060205@gmail.com> diff --git a/a/1.txt b/N1/1.txt index fd93a73..1c3800c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,9 +1,9 @@ -On 03/18/2014 03:32 PM, Antoine T?nart wrote: +On 03/18/2014 03:32 PM, Antoine Ténart wrote: > Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family). > The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local > timer, apb timers and uarts for now. > -> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com> +> Signed-off-by: Antoine Ténart <antoine.tenart@free-electrons.com> > Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> > --- > arch/arm/boot/dts/berlin2q.dtsi | 224 ++++++++++++++++++++++++++++++++++++++++ @@ -22,7 +22,7 @@ On 03/18/2014 03:32 PM, Antoine T?nart wrote: > + clock-frequency = <25000000>; > + }; [...] -> + apb at fc0000 { +> + apb@fc0000 { > + compatible = "simple-bus"; > + #address-cells = <1>; > + #size-cells = <1>; @@ -30,7 +30,7 @@ On 03/18/2014 03:32 PM, Antoine T?nart wrote: > + ranges = <0 0xfc0000 0x10000>; > + interrupt-parent = <&sic>; > + -> + uart0: uart at 9000 { +> + uart0: uart@9000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x9000 0x100>; > + interrupt-parent = <&sic>; @@ -40,7 +40,7 @@ On 03/18/2014 03:32 PM, Antoine T?nart wrote: > + status = "disabled"; > + }; > + -> + uart1: uart at a000 { +> + uart1: uart@a000 { > + compatible = "snps,dw-apb-uart"; > + reg = <0xa000 0x100>; > + interrupt-parent = <&sic>; diff --git a/a/content_digest b/N1/content_digest index e574b6f..e5b86f5 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,17 +1,22 @@ "ref\01395153167-21029-1-git-send-email-antoine.tenart@free-electrons.com\0" "ref\01395153167-21029-2-git-send-email-antoine.tenart@free-electrons.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH v4 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH v4 1/3] ARM: dts: berlin2q: add the Marvell Armada 1500 pro\0" "Date\0Wed, 19 Mar 2014 13:29:19 +0100\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Antoine T\303\251nart <antoine.tenart@free-electrons.com>\0" + "Cc\0alexandre.belloni@free-electrons.com" + zmxu@marvell.com + jszhang@marvell.com + linux-arm-kernel@lists.infradead.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" - "On 03/18/2014 03:32 PM, Antoine T?nart wrote:\n" + "On 03/18/2014 03:32 PM, Antoine T\303\251nart wrote:\n" "> Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).\n" "> The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local\n" "> timer, apb timers and uarts for now.\n" ">\n" - "> Signed-off-by: Antoine T?nart <antoine.tenart@free-electrons.com>\n" + "> Signed-off-by: Antoine T\303\251nart <antoine.tenart@free-electrons.com>\n" "> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>\n" "> ---\n" "> arch/arm/boot/dts/berlin2q.dtsi | 224 ++++++++++++++++++++++++++++++++++++++++\n" @@ -30,7 +35,7 @@ "> +\t\tclock-frequency = <25000000>;\n" "> +\t};\n" "[...]\n" - "> +\t\tapb at fc0000 {\n" + "> +\t\tapb@fc0000 {\n" "> +\t\t\tcompatible = \"simple-bus\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <1>;\n" @@ -38,7 +43,7 @@ "> +\t\t\tranges = <0 0xfc0000 0x10000>;\n" "> +\t\t\tinterrupt-parent = <&sic>;\n" "> +\n" - "> +\t\t\tuart0: uart at 9000 {\n" + "> +\t\t\tuart0: uart@9000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0x9000 0x100>;\n" "> +\t\t\t\tinterrupt-parent = <&sic>;\n" @@ -48,7 +53,7 @@ "> +\t\t\t\tstatus = \"disabled\";\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tuart1: uart at a000 {\n" + "> +\t\t\tuart1: uart@a000 {\n" "> +\t\t\t\tcompatible = \"snps,dw-apb-uart\";\n" "> +\t\t\t\treg = <0xa000 0x100>;\n" "> +\t\t\t\tinterrupt-parent = <&sic>;\n" @@ -75,4 +80,4 @@ "\n" Sebastian -37cf39ab35c720a9f56bd62e23e9d2465fb653d29c022d464245a678eba5949a +52289cf3cd3a4fa77c0ee2109dae36d99e6a3566a1dec4cd97a9cecb91a18f67
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