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From: Daniel Mack <daniel@zonque.org>
To: Daniel Mack <zonque@gmail.com>,
	Peter Ujfalusi <peter.ujfalusi@ti.com>,
	broonie@kernel.org
Cc: alsa-devel@alsa-project.org
Subject: Re: [PATCH] ASoC: davinci-mcasp: set up user bits for S/PDIF mode
Date: Thu, 27 Mar 2014 10:38:04 +0100	[thread overview]
Message-ID: <5333F17C.2020801@zonque.org> (raw)
In-Reply-To: <5333EFEE.5090000@gmail.com>

On 03/27/2014 10:31 AM, Daniel Mack wrote:
> You're right that my register address calculation has to go in 32bit
> (DAVINCI_MCASP_DITCSRA_REG + 4, DAVINCI_MCASP_DITCSRA_REG + 8, ...), but
> I still don't think the u8-mapping is correct.
> 
> I'm confused. :)

Ok ok, I am indeed. You're right, got it now. What puzzled me is that
there are registers DITCSRA0 to DITCSRA5, of which only 2 seem to be of use.

I'll resend a new version later today.


Thanks!
Daniel

      reply	other threads:[~2014-03-27  9:38 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-26 15:04 [PATCH] ASoC: davinci-mcasp: set up user bits for S/PDIF mode Daniel Mack
2014-03-27  8:16 ` Peter Ujfalusi
2014-03-27  8:39   ` Daniel Mack
2014-03-27  9:10     ` Peter Ujfalusi
2014-03-27  9:31       ` Daniel Mack
2014-03-27  9:38         ` Daniel Mack [this message]

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