* [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number
@ 2014-03-28 8:35 ` Sekhar Nori
0 siblings, 0 replies; 10+ messages in thread
From: Sekhar Nori @ 2014-03-28 8:35 UTC (permalink / raw)
To: Tony Lindgren
Cc: Linux OMAP Mailing List, Sekhar Nori, Linux ARM Mailing List
From: Afzal Mohammed <afzal@ti.com>
Its better to use the available macro than 0x1.
No functional change.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
This series applies to latest of linux-next/master
arch/arm/mach-omap2/omap4-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 95e171a..8f18460 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -219,7 +219,7 @@ static int __init omap_l2_cache_init(void)
omap_smc1(0x109, aux_ctrl);
/* Enable PL310 L2 Cache controller */
- omap_smc1(0x102, 0x1);
+ omap_smc1(0x102, L2X0_CTRL_EN);
if (of_have_populated_dt())
l2x0_of_init(aux_ctrl, L2X0_AUX_CTRL_MASK);
--
1.7.10.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number
@ 2014-03-28 8:35 ` Sekhar Nori
0 siblings, 0 replies; 10+ messages in thread
From: Sekhar Nori @ 2014-03-28 8:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Afzal Mohammed <afzal@ti.com>
Its better to use the available macro than 0x1.
No functional change.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
This series applies to latest of linux-next/master
arch/arm/mach-omap2/omap4-common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 95e171a..8f18460 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -219,7 +219,7 @@ static int __init omap_l2_cache_init(void)
omap_smc1(0x109, aux_ctrl);
/* Enable PL310 L2 Cache controller */
- omap_smc1(0x102, 0x1);
+ omap_smc1(0x102, L2X0_CTRL_EN);
if (of_have_populated_dt())
l2x0_of_init(aux_ctrl, L2X0_AUX_CTRL_MASK);
--
1.7.10.1
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/2] ARM: OMAP2+: AM43x: L2 cache support
2014-03-28 8:35 ` Sekhar Nori
@ 2014-03-28 8:35 ` Sekhar Nori
-1 siblings, 0 replies; 10+ messages in thread
From: Sekhar Nori @ 2014-03-28 8:35 UTC (permalink / raw)
To: Tony Lindgren
Cc: Linux OMAP Mailing List, Linux ARM Mailing List, Sekhar Nori
From: Afzal Mohammed <afzal@ti.com>
Add support for L2 cache controller (PL310) on
AM437x SoC.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/mach-omap2/omap4-common.c | 8 +++++++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 1124155..1fd34d2 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -65,6 +65,7 @@ config SOC_AM43XX
select ARCH_HAS_OPP
select ARM_GIC
select MACH_OMAP_GENERIC
+ select MIGHT_HAVE_CACHE_L2X0
config SOC_DRA7XX
bool "TI DRA7XX"
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 8f18460..763a169 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -188,7 +188,7 @@ static int __init omap_l2_cache_init(void)
* To avoid code running on other OMAPs in
* multi-omap builds
*/
- if (!cpu_is_omap44xx())
+ if (!cpu_is_omap44xx() && !soc_is_am43xx())
return -ENODEV;
/* Static mapping, never released */
@@ -200,6 +200,7 @@ static int __init omap_l2_cache_init(void)
* 16-way associativity, parity disabled
* Way size - 32KB (es1.0)
* Way size - 64KB (es2.0 +)
+ * Way size - 16KB (am43xx)
*/
aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
(0x1 << 25) |
@@ -208,6 +209,11 @@ static int __init omap_l2_cache_init(void)
if (omap_rev() == OMAP4430_REV_ES1_0) {
aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
+ } else if (soc_is_am43xx()) {
+ aux_ctrl |= ((0x1 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
+ (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
+ (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
+ (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
} else {
aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
(1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
--
1.7.10.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 2/2] ARM: OMAP2+: AM43x: L2 cache support
@ 2014-03-28 8:35 ` Sekhar Nori
0 siblings, 0 replies; 10+ messages in thread
From: Sekhar Nori @ 2014-03-28 8:35 UTC (permalink / raw)
To: linux-arm-kernel
From: Afzal Mohammed <afzal@ti.com>
Add support for L2 cache controller (PL310) on
AM437x SoC.
Signed-off-by: Afzal Mohammed <afzal@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
arch/arm/mach-omap2/Kconfig | 1 +
arch/arm/mach-omap2/omap4-common.c | 8 +++++++-
2 files changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 1124155..1fd34d2 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -65,6 +65,7 @@ config SOC_AM43XX
select ARCH_HAS_OPP
select ARM_GIC
select MACH_OMAP_GENERIC
+ select MIGHT_HAVE_CACHE_L2X0
config SOC_DRA7XX
bool "TI DRA7XX"
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 8f18460..763a169 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -188,7 +188,7 @@ static int __init omap_l2_cache_init(void)
* To avoid code running on other OMAPs in
* multi-omap builds
*/
- if (!cpu_is_omap44xx())
+ if (!cpu_is_omap44xx() && !soc_is_am43xx())
return -ENODEV;
/* Static mapping, never released */
@@ -200,6 +200,7 @@ static int __init omap_l2_cache_init(void)
* 16-way associativity, parity disabled
* Way size - 32KB (es1.0)
* Way size - 64KB (es2.0 +)
+ * Way size - 16KB (am43xx)
*/
aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
(0x1 << 25) |
@@ -208,6 +209,11 @@ static int __init omap_l2_cache_init(void)
if (omap_rev() == OMAP4430_REV_ES1_0) {
aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
+ } else if (soc_is_am43xx()) {
+ aux_ctrl |= ((0x1 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
+ (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
+ (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
+ (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
} else {
aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
(1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
--
1.7.10.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 2/2] ARM: OMAP2+: AM43x: L2 cache support
2014-03-28 8:35 ` Sekhar Nori
@ 2014-03-28 10:50 ` Russell King - ARM Linux
-1 siblings, 0 replies; 10+ messages in thread
From: Russell King - ARM Linux @ 2014-03-28 10:50 UTC (permalink / raw)
To: Sekhar Nori
Cc: Tony Lindgren, Linux OMAP Mailing List, Linux ARM Mailing List
On Fri, Mar 28, 2014 at 02:05:29PM +0530, Sekhar Nori wrote:
> diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
> index 8f18460..763a169 100644
> --- a/arch/arm/mach-omap2/omap4-common.c
> +++ b/arch/arm/mach-omap2/omap4-common.c
> @@ -188,7 +188,7 @@ static int __init omap_l2_cache_init(void)
> * To avoid code running on other OMAPs in
> * multi-omap builds
> */
> - if (!cpu_is_omap44xx())
> + if (!cpu_is_omap44xx() && !soc_is_am43xx())
> return -ENODEV;
>
> /* Static mapping, never released */
> @@ -200,6 +200,7 @@ static int __init omap_l2_cache_init(void)
> * 16-way associativity, parity disabled
> * Way size - 32KB (es1.0)
> * Way size - 64KB (es2.0 +)
> + * Way size - 16KB (am43xx)
> */
> aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
> (0x1 << 25) |
> @@ -208,6 +209,11 @@ static int __init omap_l2_cache_init(void)
>
> if (omap_rev() == OMAP4430_REV_ES1_0) {
> aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
> + } else if (soc_is_am43xx()) {
> + aux_ctrl |= ((0x1 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
NAK. This is cargo cult programming. Again, this code is entirely
removed by my L2 cache series.
--
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH 2/2] ARM: OMAP2+: AM43x: L2 cache support
@ 2014-03-28 10:50 ` Russell King - ARM Linux
0 siblings, 0 replies; 10+ messages in thread
From: Russell King - ARM Linux @ 2014-03-28 10:50 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Mar 28, 2014 at 02:05:29PM +0530, Sekhar Nori wrote:
> diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
> index 8f18460..763a169 100644
> --- a/arch/arm/mach-omap2/omap4-common.c
> +++ b/arch/arm/mach-omap2/omap4-common.c
> @@ -188,7 +188,7 @@ static int __init omap_l2_cache_init(void)
> * To avoid code running on other OMAPs in
> * multi-omap builds
> */
> - if (!cpu_is_omap44xx())
> + if (!cpu_is_omap44xx() && !soc_is_am43xx())
> return -ENODEV;
>
> /* Static mapping, never released */
> @@ -200,6 +200,7 @@ static int __init omap_l2_cache_init(void)
> * 16-way associativity, parity disabled
> * Way size - 32KB (es1.0)
> * Way size - 64KB (es2.0 +)
> + * Way size - 16KB (am43xx)
> */
> aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
> (0x1 << 25) |
> @@ -208,6 +209,11 @@ static int __init omap_l2_cache_init(void)
>
> if (omap_rev() == OMAP4430_REV_ES1_0) {
> aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
> + } else if (soc_is_am43xx()) {
> + aux_ctrl |= ((0x1 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
NAK. This is cargo cult programming. Again, this code is entirely
removed by my L2 cache series.
--
FTTC broadband for 0.8mile line: now@9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number
2014-03-28 8:35 ` Sekhar Nori
@ 2014-03-28 10:49 ` Russell King - ARM Linux
-1 siblings, 0 replies; 10+ messages in thread
From: Russell King - ARM Linux @ 2014-03-28 10:49 UTC (permalink / raw)
To: Sekhar Nori
Cc: Tony Lindgren, Linux OMAP Mailing List, Linux ARM Mailing List
On Fri, Mar 28, 2014 at 02:05:28PM +0530, Sekhar Nori wrote:
> From: Afzal Mohammed <afzal@ti.com>
>
> Its better to use the available macro than 0x1.
> No functional change.
>
> Signed-off-by: Afzal Mohammed <afzal@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---
> This series applies to latest of linux-next/master
NAK. See my L2 cache series posted on LAKML which completely removes
this code.
--
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number
@ 2014-03-28 10:49 ` Russell King - ARM Linux
0 siblings, 0 replies; 10+ messages in thread
From: Russell King - ARM Linux @ 2014-03-28 10:49 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Mar 28, 2014 at 02:05:28PM +0530, Sekhar Nori wrote:
> From: Afzal Mohammed <afzal@ti.com>
>
> Its better to use the available macro than 0x1.
> No functional change.
>
> Signed-off-by: Afzal Mohammed <afzal@ti.com>
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> ---
> This series applies to latest of linux-next/master
NAK. See my L2 cache series posted on LAKML which completely removes
this code.
--
FTTC broadband for 0.8mile line: now at 9.7Mbps down 460kbps up... slowly
improving, and getting towards what was expected from it.
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number
2014-03-28 10:49 ` Russell King - ARM Linux
@ 2014-03-28 10:59 ` Sekhar Nori
-1 siblings, 0 replies; 10+ messages in thread
From: Sekhar Nori @ 2014-03-28 10:59 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Tony Lindgren, Linux OMAP Mailing List, Linux ARM Mailing List
Hi Russell,
On Friday 28 March 2014 04:19 PM, Russell King - ARM Linux wrote:
> On Fri, Mar 28, 2014 at 02:05:28PM +0530, Sekhar Nori wrote:
>> From: Afzal Mohammed <afzal@ti.com>
>>
>> Its better to use the available macro than 0x1.
>> No functional change.
>>
>> Signed-off-by: Afzal Mohammed <afzal@ti.com>
>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>> ---
>> This series applies to latest of linux-next/master
>
> NAK. See my L2 cache series posted on LAKML which completely removes
> this code.
Okay. Will look at your series now.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number
@ 2014-03-28 10:59 ` Sekhar Nori
0 siblings, 0 replies; 10+ messages in thread
From: Sekhar Nori @ 2014-03-28 10:59 UTC (permalink / raw)
To: linux-arm-kernel
Hi Russell,
On Friday 28 March 2014 04:19 PM, Russell King - ARM Linux wrote:
> On Fri, Mar 28, 2014 at 02:05:28PM +0530, Sekhar Nori wrote:
>> From: Afzal Mohammed <afzal@ti.com>
>>
>> Its better to use the available macro than 0x1.
>> No functional change.
>>
>> Signed-off-by: Afzal Mohammed <afzal@ti.com>
>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>> ---
>> This series applies to latest of linux-next/master
>
> NAK. See my L2 cache series posted on LAKML which completely removes
> this code.
Okay. Will look at your series now.
Thanks,
Sekhar
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2014-03-28 11:00 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
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2014-03-28 8:35 [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number Sekhar Nori
2014-03-28 8:35 ` Sekhar Nori
2014-03-28 8:35 ` [PATCH 2/2] ARM: OMAP2+: AM43x: L2 cache support Sekhar Nori
2014-03-28 8:35 ` Sekhar Nori
2014-03-28 10:50 ` Russell King - ARM Linux
2014-03-28 10:50 ` Russell King - ARM Linux
2014-03-28 10:49 ` [PATCH 1/2] ARM: OMAP2+: L2 cache: use macro instead of const number Russell King - ARM Linux
2014-03-28 10:49 ` Russell King - ARM Linux
2014-03-28 10:59 ` Sekhar Nori
2014-03-28 10:59 ` Sekhar Nori
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