From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?ISO-8859-1?Q?Christian_K=F6nig?= Subject: Re: [PATCH] drm/radeon: Use two-ended allocation by size, v2 Date: Wed, 02 Apr 2014 20:02:44 +0200 Message-ID: <533C50C4.4000809@vodafone.de> References: <20140402200432.3850aa23.cand@gmx.com> <20140402203342.b7b1b04a.cand@gmx.com> Mime-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1"; Format="flowed" Content-Transfer-Encoding: quoted-printable Return-path: Received: from pegasos-out.vodafone.de (pegasos-out.vodafone.de [80.84.1.38]) by gabe.freedesktop.org (Postfix) with ESMTP id 804196EBE7 for ; Wed, 2 Apr 2014 11:03:01 -0700 (PDT) In-Reply-To: <20140402203342.b7b1b04a.cand@gmx.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Lauri Kasanen , Alex Deucher Cc: Jerome Glisse , Thomas Hellstrom , Maling list - DRI developers List-Id: dri-devel@lists.freedesktop.org Am 02.04.2014 19:33, schrieb Lauri Kasanen: > This decreases eviction by up to 20%, by improving the fragmentation > quality. No harm in normal cases that fit VRAM fully (PTS gaming suite). > > In some cases, even the VRAM-fitting cases improved slightly (openarena, = urban terror). > > 512kb was measured as the most optimal threshold for 3d workloads common = to radeon. > Other drivers may need different thresholds according to their workloads. > > v2: Nicer formatting > Signed-off-by: Lauri Kasanen Reviewed-by: Christian K=F6nig > --- > drivers/gpu/drm/radeon/radeon_object.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/rad= eon/radeon_object.c > index 1375ff8..19bec0d 100644 > --- a/drivers/gpu/drm/radeon/radeon_object.c > +++ b/drivers/gpu/drm/radeon/radeon_object.c > @@ -104,7 +104,7 @@ bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_obj= ect *bo) > = > void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) > { > - u32 c =3D 0; > + u32 c =3D 0, i; > = > rbo->placement.fpfn =3D 0; > rbo->placement.lpfn =3D 0; > @@ -131,6 +131,17 @@ void radeon_ttm_placement_from_domain(struct radeon_= bo *rbo, u32 domain) > rbo->placements[c++] =3D TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; > rbo->placement.num_placement =3D c; > rbo->placement.num_busy_placement =3D c; > + > + /* > + * Use two-ended allocation depending on the buffer size to > + * improve fragmentation quality. > + * 512kb was measured as the most optimal number. > + */ > + if (rbo->tbo.mem.size > 512 * 1024) { > + for (i =3D 0; i < c; i++) { > + rbo->placements[i] |=3D TTM_PL_FLAG_TOPDOWN; > + } > + } > } > = > int radeon_bo_create(struct radeon_device *rdev,