Re: [Qemu-devel] [PATCH 2.0] PPC: E500: Set PIR default reset value rather than SPR value

[Frederic Konrad <fred.konrad@greensocs.com>]

Hi Alex,

Seems to works for me ;).

On 03/04/2014 20:48, Alexander Graf wrote:
> We now reset SPRs to their reset values on CPU reset. So if we want
> to have an SPR persistently changed, we need to change its default
> reset value rather than the value itself manually.
>
> Do this for SPR_BOOKE_PIR, fixing e500v2 SMP boot.
>
> Reported-by: Frederic Konrad <fred.konrad@greensocs.com>
> Signed-off-by: Alexander Graf <agraf@suse.de>

Tested-by: KONRAD Frederic <fred.konrad@greensocs.com>

Thanks,
Fred
> ---
>   hw/ppc/e500.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
> index d7ba25f..f984b3e 100644
> --- a/hw/ppc/e500.c
> +++ b/hw/ppc/e500.c
> @@ -649,7 +649,7 @@ void ppce500_init(QEMUMachineInitArgs *args, PPCE500Params *params)
>           input = (qemu_irq *)env->irq_inputs;
>           irqs[i][OPENPIC_OUTPUT_INT] = input[PPCE500_INPUT_INT];
>           irqs[i][OPENPIC_OUTPUT_CINT] = input[PPCE500_INPUT_CINT];
> -        env->spr[SPR_BOOKE_PIR] = cs->cpu_index = i;
> +        env->spr_cb[SPR_BOOKE_PIR].default_value = cs->cpu_index = i;
>           env->mpic_iack = MPC8544_CCSRBAR_BASE +
>                            MPC8544_MPIC_REGS_OFFSET + 0xa0;
>