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From: Michal Simek <monstr@monstr.eu>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Harini Katakam <harinikatakamlinux@gmail.com>,
	Mark Brown <broonie@kernel.org>,
	Grant Likely <grant.likely@linaro.org>,
	Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	"ijc+devicetree@hellion.org.uk" <ijc+devicetree@hellion.org.uk>,
	Kumar Gala <galak@codeaurora.org>,
	linux-spi <linux-spi@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>
Subject: Re: [PATCH v2 2/2] devicetree: Add devicetree bindings documentation for Cadence SPI
Date: Fri, 04 Apr 2014 13:16:59 +0200	[thread overview]
Message-ID: <533E94AB.6060400@monstr.eu> (raw)
In-Reply-To: <CAMuHMdWvFT1kLpcYGSuNFs6qVTbn4S-9-rFV8jkJMAaS8xCDnQ@mail.gmail.com>

[-- Attachment #1: Type: text/plain, Size: 2464 bytes --]

On 04/04/2014 10:09 AM, Geert Uytterhoeven wrote:
> Hi Harini,
> 
> On Fri, Apr 4, 2014 at 5:00 AM, Harini Katakam
> <harinikatakamlinux@gmail.com> wrote:
>>>> +             num-cs = /bits/ 16 <4>;
>>>
>>> What's going on with the /bits/ - is this something that's required for
>>> the property?
>>
>> The master->num-chipselect property is 16 bit but writing <4> here directly
>> leads to 0 being read in of_property_read (because it's big endian).
>> Instead using of property read u32 and then copying, we decided to do this.
>> This was discussed on v2 between Michal and Rob:
>>>>>> +               num-chip-select = /bits/ 16 <4>;
>>>>
>>>> I was expecting you will comment this a little bit. :-)
>>>> Because all just reading this num-cs as 32bit and then
>>>> assigning this value to master->num_chipselect which is 16bit.
>>>
>>> Well, everyone else has that problem then. Obviously it takes a bit
>>> more care than just reading into a u32, but that is a kernel problem
>>> and not a problem of the binding.
>> They are not reading it directly with read_u32 but they are using
>> intermediate u32 value which is assigned to u16 which is fine.
>> This pattern is in most drivers(maybe all).
>> The point is if binding should or can't simplify driver code.
>> And from your reaction above I expect that it is up to driver
>> owner and binding doc how you want to do it.
> 
> IMHO this "/bits/ 16" doesn't simplify the binding.
> 
> As "num-cs" is a generic spi subsystem binding, it should not be
> restricted to 16 bits for the sake of a driver. As your hardware can drive 4
> chip selects, you could represent it in 3 bits (don't!).
> 
> Simple integers are 32 bit in DT, so use a temporary.

No problem to keep it there to 32bit range. I really appreciate
that discussion we have about it.

Just a note: If "num-cs" is the part of generic spi subsystem binding
maybe it should be moved directly to spi core as is done for
example for timeout-sec in watchdog.
Also this should be listed in any Documentation/devicetree/bindings/spi/spi.txt
file that this is generic spi binding.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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  reply	other threads:[~2014-04-04 11:16 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-03 11:10 [PATCH v2 1/2] SPI: Add driver for Cadence SPI controller Harini Katakam
     [not found] ` <1396523431-14519-1-git-send-email-harinik-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-04-03 11:10   ` [PATCH v2 2/2] devicetree: Add devicetree bindings documentation for Cadence SPI Harini Katakam
2014-04-03 11:10     ` Harini Katakam
2014-04-03 21:34     ` Mark Brown
     [not found]       ` <20140403213446.GB14763-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2014-04-04  3:00         ` Harini Katakam
2014-04-04  3:00           ` Harini Katakam
2014-04-04  8:09           ` Geert Uytterhoeven
2014-04-04 11:16             ` Michal Simek [this message]
2014-04-04 10:09           ` Mark Brown
     [not found]             ` <20140404100919.GO14763-GFdadSzt00ze9xe1eoZjHA@public.gmane.org>
2014-04-04 12:14               ` Harini Katakam
2014-04-04 12:14                 ` Harini Katakam
     [not found]                 ` <CAFcVECLDyfFSZFk9fzFKsr6pM=f1nwzGAhjX17z=NsbvWpiDew-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-04-04 12:24                   ` Peter Crosthwaite
2014-04-04 12:24                     ` Peter Crosthwaite
2014-04-04 12:39                     ` Harini Katakam
2014-04-04 12:46                   ` Mark Brown
2014-04-04 12:46                     ` Mark Brown
2014-04-04 14:08                     ` Harini Katakam
2014-04-04 14:30                       ` Harini Katakam
     [not found]                         ` <CAFcVECJYdW0=r425tWs8y6DJDNh3c75TAzg7+UCNRgLP8WHf+A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-04-04 23:14                           ` Peter Crosthwaite
2014-04-04 23:14                             ` Peter Crosthwaite
2014-04-05  6:05                             ` Harini Katakam
2014-04-05 23:43                               ` Peter Crosthwaite
     [not found]                                 ` <CAEgOgz5XsOYXyPTpUzx_j=+Z19oksTT5TB8G3r9KbYakrQvgHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-04-07  7:46                                   ` Harini Katakam
2014-04-07  7:46                                     ` Harini Katakam
2014-04-04 14:42                       ` Mark Brown
2014-04-04 14:49                         ` Harini Katakam
2014-04-04  9:04   ` [PATCH v2 1/2] SPI: Add driver for Cadence SPI controller sourav
2014-04-04  9:04     ` sourav
2014-04-04  9:04     ` sourav
2014-04-04  9:24     ` sourav
2014-04-04  9:24       ` sourav
2014-04-04 10:02       ` Michal Simek
2014-04-03 21:43 ` Mark Brown
2014-04-04  3:49   ` Harini Katakam
2014-04-04 22:58 ` Peter Crosthwaite

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