Re: [Qemu-devel] [PATCH v6] spapr_hcall: add address-translation-mode-on-interrupt resource in H_SET_MODE

[Alexander Graf <agraf@suse.de>]

On 22.03.14 14:03, Alexey Kardashevskiy wrote:
> This adds handling of the RESOURCE_ADDR_TRANS_MODE resource from
> the H_SET_MODE, for POWER8 (PowerISA 2.07) only.
>
> Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
> Reviewed-by: Mike Day <ncmike@ncultra.org>

Unfortunately I'm lacking a specification to verify this patch against, 
so I can not apply it upstream.


Alex

> ---
> Changes:
> v6:
> * replaced "return" with "goto out"/"break" for better consistency
> ---
>   hw/ppc/spapr_hcall.c | 29 +++++++++++++++++++++++++++++
>   target-ppc/cpu.h     |  2 ++
>   2 files changed, 31 insertions(+)
>
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 0bae053..7e4d7ff 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -746,6 +746,35 @@ static target_ulong h_set_mode(PowerPCCPU *cpu, sPAPREnvironment *spapr,
>           default:
>               ret = H_UNSUPPORTED_FLAG;
>           }
> +    } else if (resource == H_SET_MODE_RESOURCE_ADDR_TRANS_MODE) {
> +        PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
> +
> +        if (!(pcc->insns_flags2 & PPC2_ISA207S)) {
> +            ret = H_P2;
> +            goto out;
> +        }
> +        if (value1) {
> +            ret = H_P3;
> +            goto out;
> +        }
> +        if (value2) {
> +            ret = H_P4;
> +            goto out;
> +        }
> +        switch (mflags) {
> +        case 0:
> +        case 2:
> +        case 3:
> +            CPU_FOREACH(cs) {
> +                set_spr(cs, SPR_LPCR, mflags << LPCR_AIL_SH, LPCR_AIL);
> +            }
> +            ret = H_SUCCESS;
> +            break;
> +
> +        default:
> +            ret = H_UNSUPPORTED_FLAG;
> +            break;
> +        }
>       }
>   
>   out:
> diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
> index 2719c08..39527e2 100644
> --- a/target-ppc/cpu.h
> +++ b/target-ppc/cpu.h
> @@ -463,6 +463,8 @@ struct ppc_slb_t {
>   #define MSR_LE   0  /* Little-endian mode                           1 hflags */
>   
>   #define LPCR_ILE (1 << (63-38))
> +#define LPCR_AIL      0x01800000      /* Alternate interrupt location */
> +#define LPCR_AIL_SH   (63-40)
>   
>   #define msr_sf   ((env->msr >> MSR_SF)   & 1)
>   #define msr_isf  ((env->msr >> MSR_ISF)  & 1)