From: Richard Henderson <rth@twiddle.net>
To: Peter Maydell <peter.maydell@linaro.org>, qemu-devel@nongnu.org
Cc: "Peter Crosthwaite" <peter.crosthwaite@xilinx.com>,
patches@linaro.org, "Alexander Graf" <agraf@suse.de>,
"Greg Bellows" <greg.bellows@linaro.org>,
"Laurent Desnogues" <laurent.desnogues@gmail.com>,
"Alex Bennée" <alex.bennee@linaro.org>,
kvmarm@lists.cs.columbia.edu,
"Christoffer Dall" <christoffer.dall@linaro.org>
Subject: Re: [Qemu-devel] [PATCH v6 12/37] target-arm: A64: Implement DC ZVA
Date: Thu, 10 Apr 2014 10:22:30 -0700 [thread overview]
Message-ID: <5346D356.4070800@twiddle.net> (raw)
In-Reply-To: <1397146536-30116-13-git-send-email-peter.maydell@linaro.org>
On 04/10/2014 09:15 AM, Peter Maydell wrote:
> Implement the DC ZVA instruction, which clears a block of memory.
> The fast path obtains a pointer to the underlying RAM via the TCG TLB
> data structure so we can do a direct memset(), with fallback to a
> simple byte-store loop in the slow path.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2014-04-10 17:22 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-10 16:14 [Qemu-devel] [PATCH v6 00/37] AArch64 system emulation Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 01/37] target-arm: Split out private-to-target functions into internals.h Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 02/37] target-arm: Implement AArch64 DAIF system register Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 03/37] target-arm: Define exception record for AArch64 exceptions Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 04/37] target-arm: Provide correct syndrome information for cpreg access traps Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 05/37] target-arm: Add support for generating exceptions with syndrome information Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 06/37] target-arm: Provide syndrome information for MMU faults Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 07/37] target-arm: A64: Correctly fault FP/Neon if CPACR.FPEN set Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 08/37] target-arm: A64: Add assertion that FP access was checked Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 09/37] target-arm: Fix VFP enables for AArch32 EL0 under AArch64 EL1 Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 10/37] target-arm: Add v8 mmu translation support Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 11/37] target-arm: Don't mention PMU in debug feature register Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 12/37] target-arm: A64: Implement DC ZVA Peter Maydell
2014-04-10 17:22 ` Richard Henderson [this message]
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 13/37] target-arm: Use dedicated CPU state fields for ARM946 access bit registers Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 14/37] target-arm: Implement AArch64 views of fault status and data registers Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 15/37] target-arm: Add AArch64 ELR_EL1 register Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 16/37] target-arm: Implement SP_EL0, SP_EL1 Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 17/37] target-arm: Implement AArch64 SPSR_EL1 Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 18/37] target-arm: Move arm_log_exception() into internals.h Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 19/37] target-arm: Implement AArch64 EL1 exception handling Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 20/37] target-arm: Implement ARMv8 MVFR registers Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 21/37] target-arm: Add Cortex-A57 processor Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 22/37] hw/arm/virt: Add support for Cortex-A57 Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 23/37] target-arm: Implement AArch64 views of AArch32 ID registers Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 24/37] target-arm: Implement AArch64 view of CONTEXTIDR Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 25/37] target-arm: Implement AArch64 view of ACTLR Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 26/37] target-arm: Implement ISR_EL1 register Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 27/37] target-arm: Remove THUMB2EE feature from AArch64 'any' CPU Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 28/37] target-arm: Don't expose wildcard ID register definitions for ARMv8 Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 29/37] target-arm: Replace wildcarded cpreg definitions with precise ones " Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 30/37] target-arm: Implement auxiliary fault status registers Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 31/37] target-arm: Implement AArch64 address translation operations Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 32/37] target-arm: Implement RVBAR register Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 33/37] target-arm: Implement Cortex-A57 implementation-defined system registers Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 34/37] target-arm: Implement CBAR for Cortex-A57 Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 35/37] target-arm: Make Cortex-A15 CBAR read-only Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 36/37] target-arm: Handle the CPU being in AArch32 mode in the AArch64 set_pc Peter Maydell
2014-04-10 16:15 ` [Qemu-devel] [PATCH v6 37/37] target-arm: Dump 32-bit CPU state if 64 bit CPU is in AArch32 Peter Maydell
2014-04-10 22:43 ` [Qemu-devel] [PATCH v6 00/37] AArch64 system emulation Peter Crosthwaite
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