From mboxrd@z Thu Jan 1 00:00:00 1970 From: Aravind Gopalakrishnan Subject: Re: [PATCH v4 2/2] x86/PV: support data breakpoint extension registers Date: Wed, 16 Apr 2014 09:48:03 -0500 Message-ID: <534E9823.8050106@amd.com> References: <534EAE6402000078000098FB@nat28.tlf.novell.com> <534EB110020000780000996D@nat28.tlf.novell.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii"; Format="flowed" Content-Transfer-Encoding: 7bit Return-path: Received: from mail6.bemta4.messagelabs.com ([85.158.143.247]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1WaR8P-0004j9-Ob for xen-devel@lists.xenproject.org; Wed, 16 Apr 2014 14:48:21 +0000 In-Reply-To: <534EB110020000780000996D@nat28.tlf.novell.com> List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org To: Jan Beulich , xen-devel Cc: Ian Campbell , Keir Fraser , Ian Jackson , suravee.suthikulpanit@amd.com, Tim Deegan List-Id: xen-devel@lists.xenproject.org On 4/16/2014 9:34 AM, Jan Beulich wrote: > Introducing an extension to XEN_DOMCTL_[gs]et_ext_vcpucontext similar > to the generic MSR save/restore logic recently added for HVM. > > This also moves some debug register related declarations/definition to > the header intended for these. > > Signed-off-by: Jan Beulich > Tested-by: Aravind Gopalakrishnan > --- > Reviewed-by: Aravind Gopalakrishnan Thanks, -Aravind.