From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailout1.samsung.com ([203.254.224.24]:38035 "EHLO mailout1.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751331AbaDQLwO (ORCPT ); Thu, 17 Apr 2014 07:52:14 -0400 Message-id: <534FC071.9080502@samsung.com> Date: Thu, 17 Apr 2014 20:52:17 +0900 From: Chanwoo Choi MIME-version: 1.0 To: Tomasz Figa Cc: jic23@kernel.org, ch.naveen@samsung.com, kgene.kim@samsung.com, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, rdunlap@infradead.org, sachin.kamat@linaro.org, linux-iio@vger.kernel.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org Subject: Re: [PATCHv3 2/2] iio: devicetree: Add DT binding documentation for Exynos3250 ADC References: <1397643118-6934-1-git-send-email-cw00.choi@samsung.com> <1397643118-6934-3-git-send-email-cw00.choi@samsung.com> <534E6E4E.4020807@samsung.com> In-reply-to: <534E6E4E.4020807@samsung.com> Content-type: text/plain; charset=ISO-8859-1 Sender: linux-iio-owner@vger.kernel.org List-Id: linux-iio@vger.kernel.org Hi Tomasz, On 04/16/2014 08:49 PM, Tomasz Figa wrote: > Hi Chanwoo, > > On 16.04.2014 12:11, Chanwoo Choi wrote: >> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has >> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC. >> >> Cc: Rob Herring >> Cc: Pawel Moll >> Cc: Mark Rutland >> Cc: Ian Campbell >> Cc: Kumar Gala >> Cc: Randy Dunlap >> Cc: Kukjin Kim >> Cc: Naveen Krishna Chatradhi >> Cc: Tomasz Figa >> Signed-off-by: Chanwoo Choi >> Acked-by: Kyungmin Park >> --- >> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> index 5d49f2b..7532ec3 100644 >> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> @@ -14,6 +14,8 @@ Required properties: >> for exynos4412/5250 controllers. >> Must be "samsung,exynos-adc-v2" for >> future controllers. >> + Must be "samsung,exynos-adc-v3" for >> + for exynos3250 controllers. > > I don't think adc-v3 is correct here. It looks like a normal V2 with additional special clock input. Possibly "samsung,exynos3250-adc-v2" or "samsung,exynos-adc-v2-sclk" would be better choices. OK, I'll fix it with following compatible - "samsung,exynos-adc-v2-sclk" > >> - reg: Contains ADC register address range (base address and >> length) and the address of the phy enable register. >> - interrupts: Contains the interrupt information for the timer. The >> @@ -21,7 +23,11 @@ Required properties: >> the Samsung device uses. >> - #io-channel-cells = <1>; As ADC has multiple outputs >> - clocks From common clock binding: handle to adc clock. >> + From common clock binding: handle to sclk_tsadc clock >> + if using Exynos3250. >> - clock-names From common clock binding: Shall be "adc". >> + From common clock binding: Shall be "sclk_tsadc" >> + if using Exynos3250. >> - vdd-supply VDD input supply. >> >> Note: child nodes can be added for auto probing from device tree. >> @@ -41,6 +47,20 @@ adc: adc@12D10000 { >> vdd-supply = <&buck5_reg>; >> }; >> >> +If Exynos3250 uses ADC, > > Please keep proper formatting: > > Example: Node for ADC of Exynos3250 with additional special clock Thanks, I'll fix it. Best regards, Chanwoo Choi From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chanwoo Choi Subject: Re: [PATCHv3 2/2] iio: devicetree: Add DT binding documentation for Exynos3250 ADC Date: Thu, 17 Apr 2014 20:52:17 +0900 Message-ID: <534FC071.9080502@samsung.com> References: <1397643118-6934-1-git-send-email-cw00.choi@samsung.com> <1397643118-6934-3-git-send-email-cw00.choi@samsung.com> <534E6E4E.4020807@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Return-path: In-reply-to: <534E6E4E.4020807-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> Sender: linux-iio-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Tomasz Figa Cc: jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, ch.naveen-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, pawel.moll-5wv7dgnIgG8@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org, galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org, rdunlap-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org, sachin.kamat-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-samsung-soc@vger.kernel.org Hi Tomasz, On 04/16/2014 08:49 PM, Tomasz Figa wrote: > Hi Chanwoo, > > On 16.04.2014 12:11, Chanwoo Choi wrote: >> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has >> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC. >> >> Cc: Rob Herring >> Cc: Pawel Moll >> Cc: Mark Rutland >> Cc: Ian Campbell >> Cc: Kumar Gala >> Cc: Randy Dunlap >> Cc: Kukjin Kim >> Cc: Naveen Krishna Chatradhi >> Cc: Tomasz Figa >> Signed-off-by: Chanwoo Choi >> Acked-by: Kyungmin Park >> --- >> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> index 5d49f2b..7532ec3 100644 >> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> @@ -14,6 +14,8 @@ Required properties: >> for exynos4412/5250 controllers. >> Must be "samsung,exynos-adc-v2" for >> future controllers. >> + Must be "samsung,exynos-adc-v3" for >> + for exynos3250 controllers. > > I don't think adc-v3 is correct here. It looks like a normal V2 with additional special clock input. Possibly "samsung,exynos3250-adc-v2" or "samsung,exynos-adc-v2-sclk" would be better choices. OK, I'll fix it with following compatible - "samsung,exynos-adc-v2-sclk" > >> - reg: Contains ADC register address range (base address and >> length) and the address of the phy enable register. >> - interrupts: Contains the interrupt information for the timer. The >> @@ -21,7 +23,11 @@ Required properties: >> the Samsung device uses. >> - #io-channel-cells = <1>; As ADC has multiple outputs >> - clocks From common clock binding: handle to adc clock. >> + From common clock binding: handle to sclk_tsadc clock >> + if using Exynos3250. >> - clock-names From common clock binding: Shall be "adc". >> + From common clock binding: Shall be "sclk_tsadc" >> + if using Exynos3250. >> - vdd-supply VDD input supply. >> >> Note: child nodes can be added for auto probing from device tree. >> @@ -41,6 +47,20 @@ adc: adc@12D10000 { >> vdd-supply = <&buck5_reg>; >> }; >> >> +If Exynos3250 uses ADC, > > Please keep proper formatting: > > Example: Node for ADC of Exynos3250 with additional special clock Thanks, I'll fix it. Best regards, Chanwoo Choi From mboxrd@z Thu Jan 1 00:00:00 1970 From: cw00.choi@samsung.com (Chanwoo Choi) Date: Thu, 17 Apr 2014 20:52:17 +0900 Subject: [PATCHv3 2/2] iio: devicetree: Add DT binding documentation for Exynos3250 ADC In-Reply-To: <534E6E4E.4020807@samsung.com> References: <1397643118-6934-1-git-send-email-cw00.choi@samsung.com> <1397643118-6934-3-git-send-email-cw00.choi@samsung.com> <534E6E4E.4020807@samsung.com> Message-ID: <534FC071.9080502@samsung.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Tomasz, On 04/16/2014 08:49 PM, Tomasz Figa wrote: > Hi Chanwoo, > > On 16.04.2014 12:11, Chanwoo Choi wrote: >> This patch add DT binding documentation for Exynos3250 ADC IP. Exynos3250 has >> special clock ('sclk_tsadc') for ADC which provide clock to internal ADC. >> >> Cc: Rob Herring >> Cc: Pawel Moll >> Cc: Mark Rutland >> Cc: Ian Campbell >> Cc: Kumar Gala >> Cc: Randy Dunlap >> Cc: Kukjin Kim >> Cc: Naveen Krishna Chatradhi >> Cc: Tomasz Figa >> Signed-off-by: Chanwoo Choi >> Acked-by: Kyungmin Park >> --- >> .../devicetree/bindings/arm/samsung/exynos-adc.txt | 20 ++++++++++++++++++++ >> 1 file changed, 20 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> index 5d49f2b..7532ec3 100644 >> --- a/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> +++ b/Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt >> @@ -14,6 +14,8 @@ Required properties: >> for exynos4412/5250 controllers. >> Must be "samsung,exynos-adc-v2" for >> future controllers. >> + Must be "samsung,exynos-adc-v3" for >> + for exynos3250 controllers. > > I don't think adc-v3 is correct here. It looks like a normal V2 with additional special clock input. Possibly "samsung,exynos3250-adc-v2" or "samsung,exynos-adc-v2-sclk" would be better choices. OK, I'll fix it with following compatible - "samsung,exynos-adc-v2-sclk" > >> - reg: Contains ADC register address range (base address and >> length) and the address of the phy enable register. >> - interrupts: Contains the interrupt information for the timer. The >> @@ -21,7 +23,11 @@ Required properties: >> the Samsung device uses. >> - #io-channel-cells = <1>; As ADC has multiple outputs >> - clocks From common clock binding: handle to adc clock. >> + From common clock binding: handle to sclk_tsadc clock >> + if using Exynos3250. >> - clock-names From common clock binding: Shall be "adc". >> + From common clock binding: Shall be "sclk_tsadc" >> + if using Exynos3250. >> - vdd-supply VDD input supply. >> >> Note: child nodes can be added for auto probing from device tree. >> @@ -41,6 +47,20 @@ adc: adc at 12D10000 { >> vdd-supply = <&buck5_reg>; >> }; >> >> +If Exynos3250 uses ADC, > > Please keep proper formatting: > > Example: Node for ADC of Exynos3250 with additional special clock Thanks, I'll fix it. Best regards, Chanwoo Choi