From: Michal Simek <monstr@monstr.eu>
To: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Randy Dunlap <rdunlap@infradead.org>,
Russell King <linux@arm.linux.org.uk>,
Michal Simek <michal.simek@xilinx.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jslaby@suse.cz>,
Grant Likely <grant.likely@linaro.org>,
Peter Crosthwaite <peter.crosthwaite@xilinx.com>,
One Thousand Gnomes <gnomes@lxorguk.ukuu.org.uk>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-serial@vger.kernel.org
Subject: Re: [RESEND PATCH v3 9/9] ARM: zynq: DT: Migrate UART to Cadence binding
Date: Wed, 23 Apr 2014 08:29:24 +0200 [thread overview]
Message-ID: <53575DC4.6080008@monstr.eu> (raw)
In-Reply-To: <1396657425-31029-9-git-send-email-soren.brinkmann@xilinx.com>
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On 04/05/2014 02:23 AM, Soren Brinkmann wrote:
> The Zynq UART is Cadence IP and the driver has been renamed accordingly.
> Migrate the DT to use the new binding for the UART driver.
>
> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Tested-by: Michal Simek <michal.simek@xilinx.com>
> ---
> This change depends on 'tty: xuartps: Rebrand driver as Cadence UART',
> which introduces the new clock-names.
>
> Changes in v3: None
> Changes in v2: None
>
> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
> ---
> arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 789d0bacc110..d27eb5c21831 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -73,19 +73,19 @@
> };
>
> uart0: uart@e0000000 {
> - compatible = "xlnx,xuartps";
> + compatible = "xlnx,xuartps", "cdns,uart-r1p8";
> status = "disabled";
> clocks = <&clkc 23>, <&clkc 40>;
> - clock-names = "ref_clk", "aper_clk";
> + clock-names = "uart_clk", "pclk";
> reg = <0xE0000000 0x1000>;
> interrupts = <0 27 4>;
> };
>
> uart1: uart@e0001000 {
> - compatible = "xlnx,xuartps";
> + compatible = "xlnx,xuartps", "cdns,uart-r1p8";
> status = "disabled";
> clocks = <&clkc 24>, <&clkc 41>;
> - clock-names = "ref_clk", "aper_clk";
> + clock-names = "uart_clk", "pclk";
> reg = <0xE0001000 0x1000>;
> interrupts = <0 50 4>;
> };
>
Applied to zynq/dt2 branch.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
[-- Attachment #2: OpenPGP digital signature --]
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WARNING: multiple messages have this Message-ID (diff)
From: monstr@monstr.eu (Michal Simek)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND PATCH v3 9/9] ARM: zynq: DT: Migrate UART to Cadence binding
Date: Wed, 23 Apr 2014 08:29:24 +0200 [thread overview]
Message-ID: <53575DC4.6080008@monstr.eu> (raw)
In-Reply-To: <1396657425-31029-9-git-send-email-soren.brinkmann@xilinx.com>
On 04/05/2014 02:23 AM, Soren Brinkmann wrote:
> The Zynq UART is Cadence IP and the driver has been renamed accordingly.
> Migrate the DT to use the new binding for the UART driver.
>
> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
> Acked-by: Rob Herring <robh@kernel.org>
> Tested-by: Michal Simek <michal.simek@xilinx.com>
> ---
> This change depends on 'tty: xuartps: Rebrand driver as Cadence UART',
> which introduces the new clock-names.
>
> Changes in v3: None
> Changes in v2: None
>
> Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
> ---
> arch/arm/boot/dts/zynq-7000.dtsi | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
> index 789d0bacc110..d27eb5c21831 100644
> --- a/arch/arm/boot/dts/zynq-7000.dtsi
> +++ b/arch/arm/boot/dts/zynq-7000.dtsi
> @@ -73,19 +73,19 @@
> };
>
> uart0: uart at e0000000 {
> - compatible = "xlnx,xuartps";
> + compatible = "xlnx,xuartps", "cdns,uart-r1p8";
> status = "disabled";
> clocks = <&clkc 23>, <&clkc 40>;
> - clock-names = "ref_clk", "aper_clk";
> + clock-names = "uart_clk", "pclk";
> reg = <0xE0000000 0x1000>;
> interrupts = <0 27 4>;
> };
>
> uart1: uart at e0001000 {
> - compatible = "xlnx,xuartps";
> + compatible = "xlnx,xuartps", "cdns,uart-r1p8";
> status = "disabled";
> clocks = <&clkc 24>, <&clkc 41>;
> - clock-names = "ref_clk", "aper_clk";
> + clock-names = "uart_clk", "pclk";
> reg = <0xE0001000 0x1000>;
> interrupts = <0 50 4>;
> };
>
Applied to zynq/dt2 branch.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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next prev parent reply other threads:[~2014-04-23 6:29 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-05 0:23 [RESEND PATCH v3 1/9] tty: xuartps: Fix kernel-doc errors in the driver Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` [RESEND PATCH v3 2/9] tty: xuartps: Initialize ports according to aliases Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` [RESEND PATCH v3 3/9] tty: xuartps: Clean up Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` [RESEND PATCH v3 4/9] tty: xuartps: Print warning in clock notifier Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` [RESEND PATCH v3 5/9] tty: xuartps: Refactor read-modify-writes Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` [RESEND PATCH v3 6/9] tty: xuartps: Don't write IRQ disable register to enable interrupts Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
[not found] ` <1396657425-31029-1-git-send-email-soren.brinkmann-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2014-04-05 0:23 ` [RESEND PATCH v3 7/9] tty: xuartps: Rebrand driver as Cadence UART Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` [RESEND PATCH v3 8/9] tty: cadence: Document DT binding Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-23 6:29 ` Michal Simek
2014-04-23 6:29 ` Michal Simek
2014-04-05 0:23 ` [RESEND PATCH v3 9/9] ARM: zynq: DT: Migrate UART to Cadence binding Soren Brinkmann
2014-04-05 0:23 ` Soren Brinkmann
2014-04-23 6:29 ` Michal Simek [this message]
2014-04-23 6:29 ` Michal Simek
2014-04-18 16:11 ` [RESEND PATCH v3 1/9] tty: xuartps: Fix kernel-doc errors in the driver Sören Brinkmann
2014-04-18 16:11 ` Sören Brinkmann
2014-04-18 16:11 ` Sören Brinkmann
2014-04-24 23:22 ` Greg Kroah-Hartman
2014-04-24 23:22 ` Greg Kroah-Hartman
2014-04-24 23:22 ` Greg Kroah-Hartman
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