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diff for duplicates of <5357A947.2010506@hisilicon.com>

diff --git a/a/1.txt b/N1/1.txt
index 94b1e9a..42c40e7 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -3,7 +3,7 @@ gpios and can be configured to be an interrupt controller.
 The gpio controllers are compatible with the snps,dw-apb-gpio
 driver. This patch add the corresponding device tree nodes.
 
-Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
+Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
 ---
  arch/arm/boot/dts/hip04.dtsi |   76 ++++++++++++++++++++++++++++++++++++++++++
  1 file changed, 76 insertions(+)
@@ -17,13 +17,13 @@ index 7e909ee..c7c1f8c 100644
  			status = "disabled";
  		};
 +
-+		gpio at 4003000 {
++		gpio@4003000 {
 +			#address-cells = <1>;
 +			#size-cells = <0>;
 +			compatible = "snps,dw-apb-gpio";
 +			reg = <0x4003000 0x1000>;
 +
-+			gpio3: gpio-controller at 0 {
++			gpio3: gpio-controller@0 {
 +				compatible = "snps,dw-apb-gpio-port";
 +				gpio-controller;
 +				#gpio-cells = <2>;
@@ -36,13 +36,13 @@ index 7e909ee..c7c1f8c 100644
 +			};
 +		};
 +
-+		gpio at 4002000 {
++		gpio@4002000 {
 + 			#address-cells = <1>;
 + 			#size-cells = <0>;
 + 			compatible = "snps,dw-apb-gpio";
 + 			reg = <0x4002000 0x1000>;
 +
-+ 			gpio2: gpio-controller at 0 {
++ 			gpio2: gpio-controller@0 {
 + 				compatible = "snps,dw-apb-gpio-port";
 + 				gpio-controller;
 + 				#gpio-cells = <2>;
@@ -55,13 +55,13 @@ index 7e909ee..c7c1f8c 100644
 + 			};
 + 		};
 +
-+		gpio at 4001000 {
++		gpio@4001000 {
 +			#address-cells = <1>;
 +			#size-cells = <0>;
 +			compatible = "snps,dw-apb-gpio";
 +			reg = <0x4001000 0x1000>;
 +
-+			gpio1: gpio-controller at 0 {
++			gpio1: gpio-controller@0 {
 +				compatible = "snps,dw-apb-gpio-port";
 +				gpio-controller;
 +				#gpio-cells = <2>;
@@ -74,13 +74,13 @@ index 7e909ee..c7c1f8c 100644
 +			};
 +		};
 +
-+		gpio at 4000000 {
++		gpio@4000000 {
 +			#address-cells = <1>;
 +			#size-cells = <0>;
 +			compatible = "snps,dw-apb-gpio";
 +			reg = <0x4000000 0x1000>;
 +
-+			gpio0: gpio-controller at 0 {
++			gpio0: gpio-controller@0 {
 +				compatible = "snps,dw-apb-gpio-port";
 +				gpio-controller;
 +				#gpio-cells = <2>;
@@ -95,3 +95,8 @@ index 7e909ee..c7c1f8c 100644
  	};
  };
 -- 1.7.9.5
+
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index 9d11b4c..9954e27 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,7 +1,17 @@
- "From\0wangzhou1@hisilicon.com (Zhou Wang)\0"
+ "From\0Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\0"
  "Subject\0[PATCH 2/2] ARM: dts: hip04: add gpio pieces\0"
  "Date\0Wed, 23 Apr 2014 19:51:35 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
+  pawel.moll-5wv7dgnIgG8@public.gmane.org
+  mark.rutland-5wv7dgnIgG8@public.gmane.org
+  ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org
+  galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org
+  linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+ " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "Cc\0haojian.zhuang-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org"
+ " xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org\0"
  "\00:1\0"
  "b\0"
  "Hisilicon Soc hip04 has four gpio controllers, each one has 32\n"
@@ -9,7 +19,7 @@
  "The gpio controllers are compatible with the snps,dw-apb-gpio\n"
  "driver. This patch add the corresponding device tree nodes.\n"
  "\n"
- "Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>\n"
+ "Signed-off-by: Zhou Wang <wangzhou1-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\n"
  "---\n"
  " arch/arm/boot/dts/hip04.dtsi |   76 ++++++++++++++++++++++++++++++++++++++++++\n"
  " 1 file changed, 76 insertions(+)\n"
@@ -23,13 +33,13 @@
  " \t\t\tstatus = \"disabled\";\n"
  " \t\t};\n"
  "+\n"
- "+\t\tgpio at 4003000 {\n"
+ "+\t\tgpio@4003000 {\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
  "+\t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+\t\t\treg = <0x4003000 0x1000>;\n"
  "+\n"
- "+\t\t\tgpio3: gpio-controller at 0 {\n"
+ "+\t\t\tgpio3: gpio-controller@0 {\n"
  "+\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+\t\t\t\tgpio-controller;\n"
  "+\t\t\t\t#gpio-cells = <2>;\n"
@@ -42,13 +52,13 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4002000 {\n"
+ "+\t\tgpio@4002000 {\n"
  "+ \t\t\t#address-cells = <1>;\n"
  "+ \t\t\t#size-cells = <0>;\n"
  "+ \t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+ \t\t\treg = <0x4002000 0x1000>;\n"
  "+\n"
- "+ \t\t\tgpio2: gpio-controller at 0 {\n"
+ "+ \t\t\tgpio2: gpio-controller@0 {\n"
  "+ \t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+ \t\t\t\tgpio-controller;\n"
  "+ \t\t\t\t#gpio-cells = <2>;\n"
@@ -61,13 +71,13 @@
  "+ \t\t\t};\n"
  "+ \t\t};\n"
  "+\n"
- "+\t\tgpio at 4001000 {\n"
+ "+\t\tgpio@4001000 {\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
  "+\t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+\t\t\treg = <0x4001000 0x1000>;\n"
  "+\n"
- "+\t\t\tgpio1: gpio-controller at 0 {\n"
+ "+\t\t\tgpio1: gpio-controller@0 {\n"
  "+\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+\t\t\t\tgpio-controller;\n"
  "+\t\t\t\t#gpio-cells = <2>;\n"
@@ -80,13 +90,13 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4000000 {\n"
+ "+\t\tgpio@4000000 {\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
  "+\t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+\t\t\treg = <0x4000000 0x1000>;\n"
  "+\n"
- "+\t\t\tgpio0: gpio-controller at 0 {\n"
+ "+\t\t\tgpio0: gpio-controller@0 {\n"
  "+\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+\t\t\t\tgpio-controller;\n"
  "+\t\t\t\t#gpio-cells = <2>;\n"
@@ -100,6 +110,11 @@
  "+\t\t};\n"
  " \t};\n"
  " };\n"
- -- 1.7.9.5
+ "-- 1.7.9.5\n"
+ "\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-6b438fee47436dcd1c9918ae7fd75aa3f1413227e6985456e74306b9dbb7c01e
+1e2960e126488c0ae8ebc7004e3ddc7672cfa1ded965ce0813d76959d6eb8832

diff --git a/a/1.txt b/N2/1.txt
index 94b1e9a..0fedec8 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -17,13 +17,13 @@ index 7e909ee..c7c1f8c 100644
  			status = "disabled";
  		};
 +
-+		gpio at 4003000 {
++		gpio@4003000 {
 +			#address-cells = <1>;
 +			#size-cells = <0>;
 +			compatible = "snps,dw-apb-gpio";
 +			reg = <0x4003000 0x1000>;
 +
-+			gpio3: gpio-controller at 0 {
++			gpio3: gpio-controller@0 {
 +				compatible = "snps,dw-apb-gpio-port";
 +				gpio-controller;
 +				#gpio-cells = <2>;
@@ -36,13 +36,13 @@ index 7e909ee..c7c1f8c 100644
 +			};
 +		};
 +
-+		gpio at 4002000 {
++		gpio@4002000 {
 + 			#address-cells = <1>;
 + 			#size-cells = <0>;
 + 			compatible = "snps,dw-apb-gpio";
 + 			reg = <0x4002000 0x1000>;
 +
-+ 			gpio2: gpio-controller at 0 {
++ 			gpio2: gpio-controller@0 {
 + 				compatible = "snps,dw-apb-gpio-port";
 + 				gpio-controller;
 + 				#gpio-cells = <2>;
@@ -55,13 +55,13 @@ index 7e909ee..c7c1f8c 100644
 + 			};
 + 		};
 +
-+		gpio at 4001000 {
++		gpio@4001000 {
 +			#address-cells = <1>;
 +			#size-cells = <0>;
 +			compatible = "snps,dw-apb-gpio";
 +			reg = <0x4001000 0x1000>;
 +
-+			gpio1: gpio-controller at 0 {
++			gpio1: gpio-controller@0 {
 +				compatible = "snps,dw-apb-gpio-port";
 +				gpio-controller;
 +				#gpio-cells = <2>;
@@ -74,13 +74,13 @@ index 7e909ee..c7c1f8c 100644
 +			};
 +		};
 +
-+		gpio at 4000000 {
++		gpio@4000000 {
 +			#address-cells = <1>;
 +			#size-cells = <0>;
 +			compatible = "snps,dw-apb-gpio";
 +			reg = <0x4000000 0x1000>;
 +
-+			gpio0: gpio-controller at 0 {
++			gpio0: gpio-controller@0 {
 +				compatible = "snps,dw-apb-gpio-port";
 +				gpio-controller;
 +				#gpio-cells = <2>;
diff --git a/a/content_digest b/N2/content_digest
index 9d11b4c..f1e3095 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,7 +1,17 @@
- "From\0wangzhou1@hisilicon.com (Zhou Wang)\0"
+ "From\0Zhou Wang <wangzhou1@hisilicon.com>\0"
  "Subject\0[PATCH 2/2] ARM: dts: hip04: add gpio pieces\0"
  "Date\0Wed, 23 Apr 2014 19:51:35 +0800\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0<robh+dt@kernel.org>"
+  <pawel.moll@arm.com>
+  <mark.rutland@arm.com>
+  <ijc+devicetree@hellion.org.uk>
+  <galak@codeaurora.org>
+  <linux@arm.linux.org.uk>
+  <devicetree@vger.kernel.org>
+  <linux-arm-kernel@lists.infradead.org>
+ " <linux-kernel@vger.kernel.org>\0"
+ "Cc\0<haojian.zhuang@linaro.org>"
+ " <xuwei5@hisilicon.com>\0"
  "\00:1\0"
  "b\0"
  "Hisilicon Soc hip04 has four gpio controllers, each one has 32\n"
@@ -23,13 +33,13 @@
  " \t\t\tstatus = \"disabled\";\n"
  " \t\t};\n"
  "+\n"
- "+\t\tgpio at 4003000 {\n"
+ "+\t\tgpio@4003000 {\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
  "+\t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+\t\t\treg = <0x4003000 0x1000>;\n"
  "+\n"
- "+\t\t\tgpio3: gpio-controller at 0 {\n"
+ "+\t\t\tgpio3: gpio-controller@0 {\n"
  "+\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+\t\t\t\tgpio-controller;\n"
  "+\t\t\t\t#gpio-cells = <2>;\n"
@@ -42,13 +52,13 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4002000 {\n"
+ "+\t\tgpio@4002000 {\n"
  "+ \t\t\t#address-cells = <1>;\n"
  "+ \t\t\t#size-cells = <0>;\n"
  "+ \t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+ \t\t\treg = <0x4002000 0x1000>;\n"
  "+\n"
- "+ \t\t\tgpio2: gpio-controller at 0 {\n"
+ "+ \t\t\tgpio2: gpio-controller@0 {\n"
  "+ \t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+ \t\t\t\tgpio-controller;\n"
  "+ \t\t\t\t#gpio-cells = <2>;\n"
@@ -61,13 +71,13 @@
  "+ \t\t\t};\n"
  "+ \t\t};\n"
  "+\n"
- "+\t\tgpio at 4001000 {\n"
+ "+\t\tgpio@4001000 {\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
  "+\t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+\t\t\treg = <0x4001000 0x1000>;\n"
  "+\n"
- "+\t\t\tgpio1: gpio-controller at 0 {\n"
+ "+\t\t\tgpio1: gpio-controller@0 {\n"
  "+\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+\t\t\t\tgpio-controller;\n"
  "+\t\t\t\t#gpio-cells = <2>;\n"
@@ -80,13 +90,13 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgpio at 4000000 {\n"
+ "+\t\tgpio@4000000 {\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <0>;\n"
  "+\t\t\tcompatible = \"snps,dw-apb-gpio\";\n"
  "+\t\t\treg = <0x4000000 0x1000>;\n"
  "+\n"
- "+\t\t\tgpio0: gpio-controller at 0 {\n"
+ "+\t\t\tgpio0: gpio-controller@0 {\n"
  "+\t\t\t\tcompatible = \"snps,dw-apb-gpio-port\";\n"
  "+\t\t\t\tgpio-controller;\n"
  "+\t\t\t\t#gpio-cells = <2>;\n"
@@ -102,4 +112,4 @@
  " };\n"
  -- 1.7.9.5
 
-6b438fee47436dcd1c9918ae7fd75aa3f1413227e6985456e74306b9dbb7c01e
+9b5ef4bc14b3890f522cb505306c9f38133e65e69db966e3a889a5cd8e56a028

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