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From: Boris Ostrovsky <boris.ostrovsky@oracle.com>
To: "Tian, Kevin" <kevin.tian@intel.com>
Cc: "keir@xen.org" <keir@xen.org>,
	"Nakajima, Jun" <jun.nakajima@intel.com>,
	"andrew.cooper3@citrix.com" <andrew.cooper3@citrix.com>,
	"Dong, Eddie" <eddie.dong@intel.com>,
	"Dugger, Donald D" <donald.d.dugger@intel.com>,
	"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
	"dietmar.hahn@ts.fujitsu.com" <dietmar.hahn@ts.fujitsu.com>,
	"JBeulich@suse.com" <JBeulich@suse.com>,
	"suravee.suthikulpanit@amd.com" <suravee.suthikulpanit@amd.com>
Subject: Re: [PATCH v5 RESEND 15/17] x86/VPMU: NMI-based VPMU support
Date: Mon, 28 Apr 2014 13:06:11 -0400	[thread overview]
Message-ID: <535E8A83.7010405@oracle.com> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D125E51934@SHSMSX101.ccr.corp.intel.com>

On 04/26/2014 04:48 AM, Tian, Kevin wrote:
>> From: Boris Ostrovsky [mailto:boris.ostrovsky@oracle.com]
>> Sent: Wednesday, April 23, 2014 8:51 PM
>>
>> Add support for using NMIs as PMU interrupts.
>>
>> Most of processing is still performed by vpmu_do_interrupt(). However, since
>> certain operations are not NMI-safe we defer them to a softint that
>> vpmu_do_interrupt()
>> will schedule:
>> * For PV guests that would be send_guest_vcpu_virq()
>> * For HVM guests it's VLAPIC accesses and hvm_get_segment_register() (the
>> later
>> can be called in privileged profiling mode when the interrupted guest is an
>> HVM one).
>>
>> With send_guest_vcpu_virq() and hvm_get_segment_register() for PV(H) and
>> vlapic
>> accesses for HVM moved to sofint, the only routines/macros that
>> vpmu_do_interrupt()
>> calls in NMI mode are:
>> * memcpy()
>> * querying domain type (is_XX_domain())
>> * guest_cpu_user_regs()
>> * XLAT_cpu_user_regs()
>> * raise_softirq()
>> * vcpu_vpmu()
>> * vpmu_ops->arch_vpmu_save()
>> * vpmu_ops->do_interrupt() (in the future for PVH support)
>>
>> The latter two only access PMU MSRs with {rd,wr}msrl() (not the _safe
>> versions
>> which would not be NMI-safe).
>>
>> Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
> if a SCHEDULE_SOFTIRQ happens before NMI_SOFTIRQ, will it cause any race
> condition when accessing previous recorded content in nmi softirq handler?

I think you are right.

I in fact had an earlier version where I'd put the record into a linked 
list but when I later looked at that code again I took it out because I 
thought it was unnecessary. But now that you mentioned it I may need to 
resurrect that code. Let me think about this again.

-boris

  reply	other threads:[~2014-04-28 17:06 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-23 12:50 [PATCH v5 RESEND 00/17] x86/PMU: Xen PMU PV(H) support Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 01/17] common/symbols: Export hypervisor symbols to privileged guest Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 02/17] VPMU: Mark context LOADED before registers are loaded Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 03/17] x86/VPMU: Minor VPMU cleanup Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-28 13:52     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 04/17] intel/VPMU: Clean up Intel VPMU code Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-28 14:00     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 05/17] x86/VPMU: Handle APIC_LVTPC accesses Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-28 14:05     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 06/17] intel/VPMU: MSR_CORE_PERF_GLOBAL_CTRL should be initialized to zero Boris Ostrovsky
2014-04-26  8:20   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 07/17] x86/VPMU: Add public xenpmu.h Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-28  9:03     ` Jan Beulich
2014-04-28  9:09       ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 08/17] x86/VPMU: Make vpmu not HVM-specific Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 09/17] x86/VPMU: Interface for setting PMU mode and flags Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 10/17] x86/VPMU: Initialize PMU for PV guests Boris Ostrovsky
2014-04-26  8:21   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 11/17] x86/VPMU: Add support for PMU register handling on " Boris Ostrovsky
2014-04-26  8:26   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 12/17] x86/VPMU: Handle PMU interrupts for " Boris Ostrovsky
2014-04-26  8:33   ` Tian, Kevin
2014-04-28 14:15     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 13/17] x86/VPMU: Add privileged PMU mode Boris Ostrovsky
2014-04-26  8:39   ` Tian, Kevin
2014-04-28 14:23     ` Boris Ostrovsky
2014-04-23 12:50 ` [PATCH v5 RESEND 14/17] x86/VPMU: Save VPMU state for PV guests during context switch Boris Ostrovsky
2014-04-26  8:40   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 15/17] x86/VPMU: NMI-based VPMU support Boris Ostrovsky
2014-04-26  8:48   ` Tian, Kevin
2014-04-28 17:06     ` Boris Ostrovsky [this message]
2014-04-23 12:50 ` [PATCH v5 RESEND 16/17] x86/VPMU: Suport for PVH guests Boris Ostrovsky
2014-04-26  8:50   ` Tian, Kevin
2014-04-23 12:50 ` [PATCH v5 RESEND 17/17] x86/VPMU: Move VPMU files up from hvm/ directory Boris Ostrovsky
2014-04-26  8:52   ` Tian, Kevin
2014-04-24  9:22 ` [PATCH v5 RESEND 00/17] x86/PMU: Xen PMU PV(H) support Tian, Kevin
2014-04-26  8:55 ` Tian, Kevin

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