From: boris.brezillon@free-electrons.com (Boris BREZILLON)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices
Date: Mon, 28 Apr 2014 19:27:04 +0200 [thread overview]
Message-ID: <535E8F68.7040206@free-electrons.com> (raw)
In-Reply-To: <CAGb2v67GnW_ziDMjg6zObCAHZrHppGzP=+-VhpWet-NaAzx-Fg@mail.gmail.com>
On 28/04/2014 18:02, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
> <boris.brezillon@free-electrons.com> wrote:
>> Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
>> controller subdevices.
>>
>> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
>> ---
>> arch/arm/boot/dts/sun6i-a31.dtsi | 49 ++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
>> index ec3253a..83a1634 100644
>> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
>> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
>> @@ -501,6 +501,55 @@
>> prcm at 01f01c00 {
> Seems the address here was wrong to start with.
Absolutely, I'll fix it.
>
>> compatible = "allwinner,sun6i-a31-prcm";
>> reg = <0x01f01400 0x200>;
>> +
>> + ar100_mux: ar100_mux {
> Might we use clk at 01f01XXX for the names of the clock nodes?
Actually, I had a discussion with Maxime, and we decided to remove the
address suffix because the PRCM block is not a bus, and thus should not
have child node with addresses.
But I'm not a DT binding expert (it might be acceptable to define child
nodes with addresses even when the parent is not a bus :-)).
Advices from DT maintainers on that specific point would be great.
Best Regards,
Boris
>> + compatible = "allwinner,sun6i-a31-ar100-mux-clk";
>> + #clock-cells = <0>;
>> + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
>> + };
>> +
>> + ar100: ar100 {
>> + compatible = "allwinner,sun6i-a31-ar100-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ar100_mux>;
>> + };
>> +
>> + ar100_div: ar100_div {
>> + compatible = "allwinner,sun6i-a31-ar100-div-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ar100>;
>> + };
>> +
>> + ahb0: ahb0 {
>> + compatible = "fixed-factor-clock";
>> + #clock-cells = <0>;
>> + clock-div = <1>;
>> + clock-mult = <1>;
>> + clocks = <&ar100_div>;
>> + clock-output-names = "ahb0";
>> + };
>> +
>> + apb0: apb0 {
>> + compatible = "allwinner,sun6i-a31-apb0-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ahb0>;
>> + clock-output-names = "apb0";
>> + };
>> +
>> + apb0_gates: apb0_gates {
>> + compatible = "allwinner,sun6i-a31-apb0-gates-clk";
>> + #clock-cells = <1>;
>> + clocks = <&apb0>;
>> + clock-output-names = "apb0_pio", "apb0_ir",
>> + "apb0_timer01", "apb0_p2wi",
>> + "apb0_uart", "apb0_1wire",
>> + "apb0_i2c";
>> + };
>> +
>> + apb0_rst: apb0_rst {
> Also use reset at 01f01XXX here?
>
>> + compatible = "allwinner,sun6i-a31-clock-reset";
>> + #reset-cells = <1>;
>> + };
>> };
>> };
>> };
> Thanks!
>
> ChenYu
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: "Emilio López" <emilio-0Z03zUJReD5OxF6Tv1QG9Q@public.gmane.org>,
"Mike Turquette"
<mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Samuel Ortiz" <sameo-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>,
"Lee Jones" <lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
"Maxime Ripard"
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
"Philipp Zabel" <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
Shuge <shuge-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org>,
kevin <kevin-0TFLnhJekD6UEPyfVivIlAC/G2K4zDHf@public.gmane.org>,
"Hans de Goede"
<hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>,
"Randy Dunlap" <rdunlap-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
linux-kernel
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
dev <dev-3kdeTeqwOZ9EV1b7eY7vFQ@public.gmane.org>
Subject: Re: [PATCH 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices
Date: Mon, 28 Apr 2014 19:27:04 +0200 [thread overview]
Message-ID: <535E8F68.7040206@free-electrons.com> (raw)
In-Reply-To: <CAGb2v67GnW_ziDMjg6zObCAHZrHppGzP=+-VhpWet-NaAzx-Fg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
On 28/04/2014 18:02, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
> <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>> Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
>> controller subdevices.
>>
>> Signed-off-by: Boris BREZILLON <boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
>> ---
>> arch/arm/boot/dts/sun6i-a31.dtsi | 49 ++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
>> index ec3253a..83a1634 100644
>> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
>> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
>> @@ -501,6 +501,55 @@
>> prcm@01f01c00 {
> Seems the address here was wrong to start with.
Absolutely, I'll fix it.
>
>> compatible = "allwinner,sun6i-a31-prcm";
>> reg = <0x01f01400 0x200>;
>> +
>> + ar100_mux: ar100_mux {
> Might we use clk@01f01XXX for the names of the clock nodes?
Actually, I had a discussion with Maxime, and we decided to remove the
address suffix because the PRCM block is not a bus, and thus should not
have child node with addresses.
But I'm not a DT binding expert (it might be acceptable to define child
nodes with addresses even when the parent is not a bus :-)).
Advices from DT maintainers on that specific point would be great.
Best Regards,
Boris
>> + compatible = "allwinner,sun6i-a31-ar100-mux-clk";
>> + #clock-cells = <0>;
>> + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
>> + };
>> +
>> + ar100: ar100 {
>> + compatible = "allwinner,sun6i-a31-ar100-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ar100_mux>;
>> + };
>> +
>> + ar100_div: ar100_div {
>> + compatible = "allwinner,sun6i-a31-ar100-div-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ar100>;
>> + };
>> +
>> + ahb0: ahb0 {
>> + compatible = "fixed-factor-clock";
>> + #clock-cells = <0>;
>> + clock-div = <1>;
>> + clock-mult = <1>;
>> + clocks = <&ar100_div>;
>> + clock-output-names = "ahb0";
>> + };
>> +
>> + apb0: apb0 {
>> + compatible = "allwinner,sun6i-a31-apb0-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ahb0>;
>> + clock-output-names = "apb0";
>> + };
>> +
>> + apb0_gates: apb0_gates {
>> + compatible = "allwinner,sun6i-a31-apb0-gates-clk";
>> + #clock-cells = <1>;
>> + clocks = <&apb0>;
>> + clock-output-names = "apb0_pio", "apb0_ir",
>> + "apb0_timer01", "apb0_p2wi",
>> + "apb0_uart", "apb0_1wire",
>> + "apb0_i2c";
>> + };
>> +
>> + apb0_rst: apb0_rst {
> Also use reset@01f01XXX here?
>
>> + compatible = "allwinner,sun6i-a31-clock-reset";
>> + #reset-cells = <1>;
>> + };
>> };
>> };
>> };
> Thanks!
>
> ChenYu
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
WARNING: multiple messages have this Message-ID (diff)
From: Boris BREZILLON <boris.brezillon@free-electrons.com>
To: Chen-Yu Tsai <wens@csie.org>
Cc: "Emilio López" <emilio@elopez.com.ar>,
"Mike Turquette" <mturquette@linaro.org>,
"Samuel Ortiz" <sameo@linux.intel.com>,
"Lee Jones" <lee.jones@linaro.org>,
"Maxime Ripard" <maxime.ripard@free-electrons.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
Shuge <shuge@allwinnertech.com>, kevin <kevin@allwinnertech.com>,
"Hans de Goede" <hdegoede@redhat.com>,
"Randy Dunlap" <rdunlap@infradead.org>,
devicetree <devicetree@vger.kernel.org>,
linux-doc@vger.kernel.org,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
dev <dev@linux-sunxi.org>
Subject: Re: [PATCH 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices
Date: Mon, 28 Apr 2014 19:27:04 +0200 [thread overview]
Message-ID: <535E8F68.7040206@free-electrons.com> (raw)
In-Reply-To: <CAGb2v67GnW_ziDMjg6zObCAHZrHppGzP=+-VhpWet-NaAzx-Fg@mail.gmail.com>
On 28/04/2014 18:02, Chen-Yu Tsai wrote:
> Hi,
>
> On Mon, Apr 28, 2014 at 10:58 PM, Boris BREZILLON
> <boris.brezillon@free-electrons.com> wrote:
>> Add DT definitions for PRCM (Power/Reset/Clock Management) clock and reset
>> controller subdevices.
>>
>> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
>> ---
>> arch/arm/boot/dts/sun6i-a31.dtsi | 49 ++++++++++++++++++++++++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
>> index ec3253a..83a1634 100644
>> --- a/arch/arm/boot/dts/sun6i-a31.dtsi
>> +++ b/arch/arm/boot/dts/sun6i-a31.dtsi
>> @@ -501,6 +501,55 @@
>> prcm@01f01c00 {
> Seems the address here was wrong to start with.
Absolutely, I'll fix it.
>
>> compatible = "allwinner,sun6i-a31-prcm";
>> reg = <0x01f01400 0x200>;
>> +
>> + ar100_mux: ar100_mux {
> Might we use clk@01f01XXX for the names of the clock nodes?
Actually, I had a discussion with Maxime, and we decided to remove the
address suffix because the PRCM block is not a bus, and thus should not
have child node with addresses.
But I'm not a DT binding expert (it might be acceptable to define child
nodes with addresses even when the parent is not a bus :-)).
Advices from DT maintainers on that specific point would be great.
Best Regards,
Boris
>> + compatible = "allwinner,sun6i-a31-ar100-mux-clk";
>> + #clock-cells = <0>;
>> + clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>;
>> + };
>> +
>> + ar100: ar100 {
>> + compatible = "allwinner,sun6i-a31-ar100-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ar100_mux>;
>> + };
>> +
>> + ar100_div: ar100_div {
>> + compatible = "allwinner,sun6i-a31-ar100-div-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ar100>;
>> + };
>> +
>> + ahb0: ahb0 {
>> + compatible = "fixed-factor-clock";
>> + #clock-cells = <0>;
>> + clock-div = <1>;
>> + clock-mult = <1>;
>> + clocks = <&ar100_div>;
>> + clock-output-names = "ahb0";
>> + };
>> +
>> + apb0: apb0 {
>> + compatible = "allwinner,sun6i-a31-apb0-clk";
>> + #clock-cells = <0>;
>> + clocks = <&ahb0>;
>> + clock-output-names = "apb0";
>> + };
>> +
>> + apb0_gates: apb0_gates {
>> + compatible = "allwinner,sun6i-a31-apb0-gates-clk";
>> + #clock-cells = <1>;
>> + clocks = <&apb0>;
>> + clock-output-names = "apb0_pio", "apb0_ir",
>> + "apb0_timer01", "apb0_p2wi",
>> + "apb0_uart", "apb0_1wire",
>> + "apb0_i2c";
>> + };
>> +
>> + apb0_rst: apb0_rst {
> Also use reset@01f01XXX here?
>
>> + compatible = "allwinner,sun6i-a31-clock-reset";
>> + #reset-cells = <1>;
>> + };
>> };
>> };
>> };
> Thanks!
>
> ChenYu
--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2014-04-28 17:27 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-04-28 14:58 [PATCH 0/7] mfd: add basic sun6i A31 PRCM support Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` [PATCH 1/7] reset: sunxi: document sunxi's reset controllers bindings Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 23:22 ` Maxime Ripard
2014-04-28 23:22 ` Maxime Ripard
2014-04-28 14:58 ` [PATCH 2/7] reset: sunxi: allow MFD subdevices probe Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 23:27 ` Maxime Ripard
2014-04-28 23:27 ` Maxime Ripard
2014-04-28 14:58 ` [PATCH 3/7] mfd: add support for sun6i PRCM (Power/Reset/Clock Management) unit Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 23:29 ` Maxime Ripard
2014-04-28 23:29 ` Maxime Ripard
2014-04-28 23:29 ` Maxime Ripard
2014-04-28 14:58 ` [PATCH 4/7] mfd: sun6i-prcm: document DT bindings Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 23:31 ` Maxime Ripard
2014-04-28 23:31 ` Maxime Ripard
2014-04-28 14:58 ` [PATCH 5/7] clk: sunxi: add PRCM (Power/Reset/Clock Management) clks support Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 15:25 ` Emilio López
2014-04-28 15:25 ` Emilio López
2014-04-28 15:25 ` Emilio López
2014-04-28 16:01 ` Boris BREZILLON
2014-04-28 16:01 ` Boris BREZILLON
2014-04-28 16:01 ` Boris BREZILLON
2014-04-28 15:59 ` Chen-Yu Tsai
2014-04-28 15:59 ` Chen-Yu Tsai
2014-04-28 15:59 ` Chen-Yu Tsai
2014-04-28 17:14 ` Boris BREZILLON
2014-04-28 17:14 ` Boris BREZILLON
2014-04-28 18:03 ` Chen-Yu Tsai
2014-04-28 18:03 ` Chen-Yu Tsai
2014-04-28 18:03 ` Chen-Yu Tsai
2014-04-28 18:19 ` Boris BREZILLON
2014-04-28 18:19 ` Boris BREZILLON
2014-04-28 18:19 ` Boris BREZILLON
2014-04-28 23:40 ` Maxime Ripard
2014-04-28 23:40 ` Maxime Ripard
2014-05-07 17:12 ` Boris BREZILLON
2014-05-07 17:12 ` Boris BREZILLON
2014-05-08 2:45 ` Maxime Ripard
2014-05-08 2:45 ` Maxime Ripard
2014-05-08 2:45 ` Maxime Ripard
2014-04-28 14:58 ` [PATCH 6/7] clk: sunxi: document PRCM clock compatible strings Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` [PATCH 7/7] ARM: sunxi: dt: add PRCM clk and reset controller subdevices Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 14:58 ` Boris BREZILLON
2014-04-28 16:02 ` Chen-Yu Tsai
2014-04-28 16:02 ` Chen-Yu Tsai
2014-04-28 17:27 ` Boris BREZILLON [this message]
2014-04-28 17:27 ` Boris BREZILLON
2014-04-28 17:27 ` Boris BREZILLON
2014-04-28 17:57 ` Chen-Yu Tsai
2014-04-28 17:57 ` Chen-Yu Tsai
2014-04-28 17:57 ` Chen-Yu Tsai
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