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diff for duplicates of <5363E8E9.6000908@wwwdotorg.org>

diff --git a/a/1.txt b/N1/1.txt
index e79cb1f..52ca9e1 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -48,3 +48,7 @@ Now, perhaps there are devices which themselves control whether
 transactions are sent to the IOMMU or direct to RAM, but I'm not
 familiar with them. Is the GPU in that category, since it has its own
 GMMU, albeit chained into the SMMU IIRC?
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
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diff --git a/a/content_digest b/N1/content_digest
index 6f3be63..7ff6197 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -2,10 +2,21 @@
  "ref\020140502110557.GA18452@ulmo\0"
  "ref\04369315.NLgjZW6qVF@wuerfel\0"
  "ref\020140502132327.GA14612@ulmo\0"
- "From\0swarren@wwwdotorg.org (Stephen Warren)\0"
- "Subject\0[RFC] Describing arbitrary bus mastering relationships in DT\0"
+ "From\0Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>\0"
+ "Subject\0Re: [RFC] Describing arbitrary bus mastering relationships in DT\0"
  "Date\0Fri, 02 May 2014 12:50:17 -0600\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>"
+ " Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>\0"
+ "Cc\0Dave Martin <Dave.Martin-5wv7dgnIgG8@public.gmane.org>"
+  devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  Shaik Ameer Basha <shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
+  Grant Grundler <grundler-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
+  Hiroshi Doyu <hdoyu-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
+  Jason Gunthorpe <jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>
+  Will Deacon <Will.Deacon-5wv7dgnIgG8@public.gmane.org>
+  Mark Rutland <Mark.Rutland-5wv7dgnIgG8@public.gmane.org>
+ " Marc Zyngier <Marc.Zyngier-5wv7dgnIgG8@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "On 05/02/2014 07:23 AM, Thierry Reding wrote:\n"
@@ -57,6 +68,10 @@
  "Now, perhaps there are devices which themselves control whether\n"
  "transactions are sent to the IOMMU or direct to RAM, but I'm not\n"
  "familiar with them. Is the GPU in that category, since it has its own\n"
- GMMU, albeit chained into the SMMU IIRC?
+ "GMMU, albeit chained into the SMMU IIRC?\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-d54e8c0446382de83e7d377db08bf240052811a1aa97f1dc55ce6a36d9cbac57
+64caca53cffe2b751016f09a4f4f0670658e0168acb27b9624c3451fae70b27c

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