Re: [lm-sensors] New field in MSR_TEMPERATURE_TARGET

[Rudolf Marek <r.marek@assembler.cz>]

Hi Khali,

After some google magic I found this:

http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/4th-gen-core-family-mobile-u-y-processor-lines-vol-1-datasheet.pdf

TCC Activation Offset can be used to activate the Adaptive Thermal Monitor at
temperatures lower than TjMAX. It is the preferred thermal protection mechanism 
for Intel Turbo Boost Technology 2.0 operation since ACPI passive throttling 
states will pull the processor out of turbo mode operation when triggered. An 
offset (in degrees Celsius) can be written to the TEMPERATURE_TARGET (0x1A2) 
MSR, bits [29:24]. This value will be subtracted from the value found in bits 
[23:16]. The default offset is 0 °C, where throttling will occur at TjMAX. The 
offset should be set lower than any other protection such as ACPI _PSV trip points.

So yes you could make it writable by user, and this value is always subtracted. 
It looks like this should be taken into account for tempN_crit on the Silvermont 
CPUs.

The Silvermont CPU can be identified in your [1] by looking at 35.4:

Table 35-6 lists model-specific registers (MSRs) for Intel processors based on 
the Silvermont microarchitecture These processors have a CPUID signature with 
DisplayFamily_DisplayModel of  06_37H, 06_4AH, 06_4DH,
06_5AH, and 06_5DH, see Table 35-1.

Thanks
Rudolf



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