From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christian Zigotzky Date: Mon, 05 May 2014 21:23:28 +0000 Subject: Re: [PATCH V4] POWERPC: BOOK3S: KVM: Use the saved dar value and generic make_dsisr Message-Id: <53680150.3050603@xenosoft.de> List-Id: References: <1399224075-18041-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <536773C2.1070502@suse.de> <87tx949u9d.fsf@linux.vnet.ibm.com> <5367A39D.9080709@suse.de> In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: Olof Johansson , Alexander Graf , "Aneesh Kumar K.V" Cc: Paul Mackerras , linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org, kvm@vger.kernel.org Am 05.05.14 16:57, schrieb Olof Johansson: > [Now without HTML email -- it's what you get for cc:ing me at work > instead of my upstream email :)] > > 2014-05-05 7:43 GMT-07:00 Alexander Graf : >> On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote: >>> Alexander Graf writes: >>> >>>> On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote: >>>>> Although it's optional IBM POWER cpus always had DAR value set on >>>>> alignment interrupt. So don't try to compute these values. >>>>> >>>>> Signed-off-by: Aneesh Kumar K.V >>>>> --- >>>>> Changes from V3: >>>>> * Use make_dsisr instead of checking feature flag to decide whether to use >>>>> saved dsisr or not >>>>> >>> .... >>> >>>>> ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst) >>>>> { >>>>> +#ifdef CONFIG_PPC_BOOK3S_64 >>>>> + return vcpu->arch.fault_dar; >>>> How about PA6T and G5s? >>>> >>>> >>> Paul mentioned that BOOK3S always had DAR value set on alignment >>> interrupt. And the patch is to enable/collect correct DAR value when >>> running with Little Endian PR guest. Now to limit the impact and to >>> enable Little Endian PR guest, I ended up doing the conditional code >>> only for book3s 64 for which we know for sure that we set DAR value. >> >> Yes, and I'm asking whether we know that this statement holds true for PA6T and G5 chips which I wouldn't consider IBM POWER. Since the G5 is at least developed by IBM, I'd assume its semantics here are similar to POWER4, but for PA6T I wouldn't be so sure. >> > Thanks for looking out for us, obviously IBM doesn't (based on the > reply a minute ago). > > In the end, since there's been no work to enable KVM on PA6T, I'm not > too worried. I guess it's one more thing to sort out (and check for) > whenever someone does that. > > I definitely don't have cycles to deal with that myself at this time. > I can help find hardware for someone who wants to, but even then I'm > guessing the interest is pretty limited. > > > -Olof > -- > To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Just for info: "PR" KVM works great on my PA6T machine. I booted the Lubuntu 14.04 PowerPC live DVD on a QEMU virtual machine with "PR" KVM successfully. But Mac OS X Jaguar, Panther, and Tiger don't boot with KVM on Mac-on-Linux and QEMU. See http://forum.hyperion-entertainment.biz/viewtopic.php?f5&t47. -- Christian From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mo4-p00-ob.smtp.rzone.de (mo4-p00-ob.smtp.rzone.de [81.169.146.162]) (using TLSv1.2 with cipher DHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 101C7140E3F for ; Tue, 6 May 2014 07:23:40 +1000 (EST) Message-ID: <53680150.3050603@xenosoft.de> Date: Mon, 05 May 2014 23:23:28 +0200 From: Christian Zigotzky MIME-Version: 1.0 To: Olof Johansson , Alexander Graf , "Aneesh Kumar K.V" Subject: Re: [PATCH V4] POWERPC: BOOK3S: KVM: Use the saved dar value and generic make_dsisr References: <1399224075-18041-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <536773C2.1070502@suse.de> <87tx949u9d.fsf@linux.vnet.ibm.com> <5367A39D.9080709@suse.de> In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Cc: Paul Mackerras , linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org, kvm@vger.kernel.org List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Am 05.05.14 16:57, schrieb Olof Johansson: > [Now without HTML email -- it's what you get for cc:ing me at work > instead of my upstream email :)] > > 2014-05-05 7:43 GMT-07:00 Alexander Graf : >> On 05/05/2014 04:26 PM, Aneesh Kumar K.V wrote: >>> Alexander Graf writes: >>> >>>> On 05/04/2014 07:21 PM, Aneesh Kumar K.V wrote: >>>>> Although it's optional IBM POWER cpus always had DAR value set on >>>>> alignment interrupt. So don't try to compute these values. >>>>> >>>>> Signed-off-by: Aneesh Kumar K.V >>>>> --- >>>>> Changes from V3: >>>>> * Use make_dsisr instead of checking feature flag to decide whether to use >>>>> saved dsisr or not >>>>> >>> .... >>> >>>>> ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst) >>>>> { >>>>> +#ifdef CONFIG_PPC_BOOK3S_64 >>>>> + return vcpu->arch.fault_dar; >>>> How about PA6T and G5s? >>>> >>>> >>> Paul mentioned that BOOK3S always had DAR value set on alignment >>> interrupt. And the patch is to enable/collect correct DAR value when >>> running with Little Endian PR guest. Now to limit the impact and to >>> enable Little Endian PR guest, I ended up doing the conditional code >>> only for book3s 64 for which we know for sure that we set DAR value. >> >> Yes, and I'm asking whether we know that this statement holds true for PA6T and G5 chips which I wouldn't consider IBM POWER. Since the G5 is at least developed by IBM, I'd assume its semantics here are similar to POWER4, but for PA6T I wouldn't be so sure. >> > Thanks for looking out for us, obviously IBM doesn't (based on the > reply a minute ago). > > In the end, since there's been no work to enable KVM on PA6T, I'm not > too worried. I guess it's one more thing to sort out (and check for) > whenever someone does that. > > I definitely don't have cycles to deal with that myself at this time. > I can help find hardware for someone who wants to, but even then I'm > guessing the interest is pretty limited. > > > -Olof > -- > To unsubscribe from this list: send the line "unsubscribe kvm-ppc" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Just for info: "PR" KVM works great on my PA6T machine. I booted the Lubuntu 14.04 PowerPC live DVD on a QEMU virtual machine with "PR" KVM successfully. But Mac OS X Jaguar, Panther, and Tiger don't boot with KVM on Mac-on-Linux and QEMU. See http://forum.hyperion-entertainment.biz/viewtopic.php?f=35&t=1747. -- Christian From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christian Zigotzky Subject: Re: [PATCH V4] POWERPC: BOOK3S: KVM: Use the saved dar value and generic make_dsisr Date: Mon, 05 May 2014 23:23:28 +0200 Message-ID: <53680150.3050603@xenosoft.de> References: <1399224075-18041-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com> <536773C2.1070502@suse.de> <87tx949u9d.fsf@linux.vnet.ibm.com> <5367A39D.9080709@suse.de> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8"; Format="flowed" Content-Transfer-Encoding: base64 Cc: Paul Mackerras , linuxppc-dev@lists.ozlabs.org, kvm-ppc@vger.kernel.org, kvm@vger.kernel.org To: Olof Johansson , Alexander Graf , "Aneesh Kumar K.V" Return-path: In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+glppe-linuxppc-embedded-2=m.gmane.org@lists.ozlabs.org Sender: "Linuxppc-dev" List-Id: kvm.vger.kernel.org QW0gMDUuMDUuMTQgMTY6NTcsIHNjaHJpZWIgT2xvZiBKb2hhbnNzb246Cj4gW05vdyB3aXRob3V0 IEhUTUwgZW1haWwgLS0gaXQncyB3aGF0IHlvdSBnZXQgZm9yIGNjOmluZyBtZSBhdCB3b3JrCj4g aW5zdGVhZCBvZiBteSB1cHN0cmVhbSBlbWFpbCA6KV0KPgo+IDIwMTQtMDUtMDUgNzo0MyBHTVQt MDc6MDAgQWxleGFuZGVyIEdyYWYgPGFncmFmQHN1c2UuZGU+Ogo+PiBPbiAwNS8wNS8yMDE0IDA0 OjI2IFBNLCBBbmVlc2ggS3VtYXIgSy5WIHdyb3RlOgo+Pj4gQWxleGFuZGVyIEdyYWYgPGFncmFm QHN1c2UuZGU+IHdyaXRlczoKPj4+Cj4+Pj4gT24gMDUvMDQvMjAxNCAwNzoyMSBQTSwgQW5lZXNo IEt1bWFyIEsuViB3cm90ZToKPj4+Pj4gQWx0aG91Z2ggaXQncyBvcHRpb25hbCBJQk0gUE9XRVIg Y3B1cyBhbHdheXMgaGFkIERBUiB2YWx1ZSBzZXQgb24KPj4+Pj4gYWxpZ25tZW50IGludGVycnVw dC4gU28gZG9uJ3QgdHJ5IHRvIGNvbXB1dGUgdGhlc2UgdmFsdWVzLgo+Pj4+Pgo+Pj4+PiBTaWdu ZWQtb2ZmLWJ5OiBBbmVlc2ggS3VtYXIgSy5WIDxhbmVlc2gua3VtYXJAbGludXgudm5ldC5pYm0u Y29tPgo+Pj4+PiAtLS0KPj4+Pj4gQ2hhbmdlcyBmcm9tIFYzOgo+Pj4+PiAqIFVzZSBtYWtlX2Rz aXNyIGluc3RlYWQgb2YgY2hlY2tpbmcgZmVhdHVyZSBmbGFnIHRvIGRlY2lkZSB3aGV0aGVyIHRv IHVzZQo+Pj4+PiAgICAgIHNhdmVkIGRzaXNyIG9yIG5vdAo+Pj4+Pgo+Pj4gLi4uLgo+Pj4KPj4+ Pj4gICAgIHVsb25nIGt2bXBwY19hbGlnbm1lbnRfZGFyKHN0cnVjdCBrdm1fdmNwdSAqdmNwdSwg dW5zaWduZWQgaW50IGluc3QpCj4+Pj4+ICAgICB7Cj4+Pj4+ICsjaWZkZWYgQ09ORklHX1BQQ19C T09LM1NfNjQKPj4+Pj4gKyAgICAgICByZXR1cm4gdmNwdS0+YXJjaC5mYXVsdF9kYXI7Cj4+Pj4g SG93IGFib3V0IFBBNlQgYW5kIEc1cz8KPj4+Pgo+Pj4+Cj4+PiBQYXVsIG1lbnRpb25lZCB0aGF0 IEJPT0szUyBhbHdheXMgaGFkIERBUiB2YWx1ZSBzZXQgb24gYWxpZ25tZW50Cj4+PiBpbnRlcnJ1 cHQuIEFuZCB0aGUgcGF0Y2ggaXMgdG8gZW5hYmxlL2NvbGxlY3QgY29ycmVjdCBEQVIgdmFsdWUg d2hlbgo+Pj4gcnVubmluZyB3aXRoIExpdHRsZSBFbmRpYW4gUFIgZ3Vlc3QuIE5vdyB0byBsaW1p dCB0aGUgaW1wYWN0IGFuZCB0bwo+Pj4gZW5hYmxlIExpdHRsZSBFbmRpYW4gUFIgZ3Vlc3QsIEkg ZW5kZWQgdXAgZG9pbmcgdGhlIGNvbmRpdGlvbmFsIGNvZGUKPj4+IG9ubHkgZm9yIGJvb2szcyA2 NCBmb3Igd2hpY2ggd2Uga25vdyBmb3Igc3VyZSB0aGF0IHdlIHNldCBEQVIgdmFsdWUuCj4+Cj4+ IFllcywgYW5kIEknbSBhc2tpbmcgd2hldGhlciB3ZSBrbm93IHRoYXQgdGhpcyBzdGF0ZW1lbnQg aG9sZHMgdHJ1ZSBmb3IgUEE2VCBhbmQgRzUgY2hpcHMgd2hpY2ggSSB3b3VsZG4ndCBjb25zaWRl ciBJQk0gUE9XRVIuIFNpbmNlIHRoZSBHNSBpcyBhdCBsZWFzdCBkZXZlbG9wZWQgYnkgSUJNLCBJ J2QgYXNzdW1lIGl0cyBzZW1hbnRpY3MgaGVyZSBhcmUgc2ltaWxhciB0byBQT1dFUjQsIGJ1dCBm b3IgUEE2VCBJIHdvdWxkbid0IGJlIHNvIHN1cmUuCj4+Cj4gVGhhbmtzIGZvciBsb29raW5nIG91 dCBmb3IgdXMsIG9idmlvdXNseSBJQk0gZG9lc24ndCAoYmFzZWQgb24gdGhlCj4gcmVwbHkgYSBt aW51dGUgYWdvKS4KPgo+IEluIHRoZSBlbmQsIHNpbmNlIHRoZXJlJ3MgYmVlbiBubyB3b3JrIHRv IGVuYWJsZSBLVk0gb24gUEE2VCwgSSdtIG5vdAo+IHRvbyB3b3JyaWVkLiBJIGd1ZXNzIGl0J3Mg b25lIG1vcmUgdGhpbmcgdG8gc29ydCBvdXQgKGFuZCBjaGVjayBmb3IpCj4gd2hlbmV2ZXIgc29t ZW9uZSBkb2VzIHRoYXQuCj4KPiBJIGRlZmluaXRlbHkgZG9uJ3QgaGF2ZSBjeWNsZXMgdG8gZGVh bCB3aXRoIHRoYXQgbXlzZWxmIGF0IHRoaXMgdGltZS4KPiBJIGNhbiBoZWxwIGZpbmQgaGFyZHdh cmUgZm9yIHNvbWVvbmUgd2hvIHdhbnRzIHRvLCBidXQgZXZlbiB0aGVuIEknbQo+IGd1ZXNzaW5n IHRoZSBpbnRlcmVzdCBpcyBwcmV0dHkgbGltaXRlZC4KPgo+Cj4gLU9sb2YKPiAtLQo+IFRvIHVu c3Vic2NyaWJlIGZyb20gdGhpcyBsaXN0OiBzZW5kIHRoZSBsaW5lICJ1bnN1YnNjcmliZSBrdm0t cHBjIiBpbgo+IHRoZSBib2R5IG9mIGEgbWVzc2FnZSB0byBtYWpvcmRvbW9Admdlci5rZXJuZWwu b3JnCj4gTW9yZSBtYWpvcmRvbW8gaW5mbyBhdCAgaHR0cDovL3ZnZXIua2VybmVsLm9yZy9tYWpv cmRvbW8taW5mby5odG1sCj4KSnVzdCBmb3IgaW5mbzogIlBSIiBLVk0gd29ya3MgZ3JlYXQgb24g bXkgUEE2VCBtYWNoaW5lLiBJIGJvb3RlZCB0aGUgCkx1YnVudHUgMTQuMDQgUG93ZXJQQyBsaXZl IERWRCBvbiBhIFFFTVUgdmlydHVhbCBtYWNoaW5lIHdpdGggIlBSIiBLVk0gCnN1Y2Nlc3NmdWxs eS4gQnV0IE1hYyBPUyBYIEphZ3VhciwgUGFudGhlciwgYW5kIFRpZ2VyIGRvbid0IGJvb3Qgd2l0 aCAKS1ZNIG9uIE1hYy1vbi1MaW51eCBhbmQgUUVNVS4gU2VlIApodHRwOi8vZm9ydW0uaHlwZXJp b24tZW50ZXJ0YWlubWVudC5iaXovdmlld3RvcGljLnBocD9mPTM1JnQ9MTc0Ny4KCi0tIENocmlz dGlhbgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwpMaW51 eHBwYy1kZXYgbWFpbGluZyBsaXN0CkxpbnV4cHBjLWRldkBsaXN0cy5vemxhYnMub3JnCmh0dHBz Oi8vbGlzdHMub3psYWJzLm9yZy9saXN0aW5mby9saW51eHBwYy1kZXY=