Re: [PATCH] tty: serial: uartlite: Specify time for sending chars

[Michal Simek <monstr@monstr.eu>]

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On 05/05/2014 09:42 PM, Peter Korsgaard wrote:
>>>>>> "Michal" == Michal Simek <monstr@monstr.eu> writes:
> 
> Hi,
> 
>  >> > diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
>  >> > index 5f90ef24d475..723a6b79cd14 100644
>  >> > --- a/drivers/tty/serial/uartlite.c
>  >> > +++ b/drivers/tty/serial/uartlite.c
>  >> > @@ -418,14 +418,20 @@ static struct uart_ops ulite_ops = {
>  >> >  #ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
>  >> >  static void ulite_console_wait_tx(struct uart_port *port)
>  >> >  {
>  >> > -	int i;
>  >> >  	u8 val;
>  >> > +	unsigned long timeout;
>  >> 
>  >> >  	/* Spin waiting for TX fifo to have space available */
>  >> > -	for (i = 0; i < 100000; i++) {
>  >> 
>  >> It would be good to add a note about the slow jtag variant here.
> 
>  > What exactly you would like to see here?
>  > Just that this 1s is here because of mdm uart.
> 
> Something like:
> 
>  /*
>   * Spin waiting for TX fifo to have space available.
>   * When using the Microblaze Debug Module this can take up to 1s
>   */

up to you. You are driver owner. :-)
I have sent v2 with this change and I have added your ACK.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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