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diff for duplicates of <5368A78D.4070509@suse.de>

diff --git a/a/1.txt b/N1/1.txt
index 51367bf..1f0d341 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -10,7 +10,7 @@ On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
 > --- a/arch/powerpc/include/asm/kvm_book3s_64.h
 > +++ b/arch/powerpc/include/asm/kvm_book3s_64.h
 > @@ -77,34 +77,122 @@ static inline long try_lock_hpte(unsigned long *hpte, unsigned long bits)
->   	return old = 0;
+>   	return old == 0;
 >   }
 >   
 > +static inline int __hpte_actual_psize(unsigned int lp, int psize)
@@ -22,22 +22,22 @@ On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
 > +	for (i = 1; i < MMU_PAGE_COUNT; i++) {
 > +
 > +		/* invalid penc */
-> +		if (mmu_psize_defs[psize].penc[i] = -1)
+> +		if (mmu_psize_defs[psize].penc[i] == -1)
 > +			continue;
 > +		/*
 > +		 * encoding bits per actual page size
 > +		 *        PTE LP     actual page size
 > +		 *    rrrr rrrz		>=8KB
-> +		 *    rrrr rrzz		>\x16KB
-> +		 *    rrrr rzzz		>2KB
-> +		 *    rrrr zzzz		>dKB
+> +		 *    rrrr rrzz		>=16KB
+> +		 *    rrrr rzzz		>=32KB
+> +		 *    rrrr zzzz		>=64KB
 > +		 * .......
 > +		 */
 > +		shift = mmu_psize_defs[i].shift - LP_SHIFT;
 > +		if (shift > LP_BITS)
 > +			shift = LP_BITS;
 > +		mask = (1 << shift) - 1;
-> +		if ((lp & mask) = mmu_psize_defs[psize].penc[i])
+> +		if ((lp & mask) == mmu_psize_defs[psize].penc[i])
 > +			return i;
 > +	}
 > +	return -1;
@@ -160,9 +160,9 @@ On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
 >   	/* only handle 4k, 64k and 16M pages for now */
 >   	if (!(h & HPTE_V_LARGE))
 > -		return 1ul << 12;		/* 4k page */
-> -	if ((l & 0xf000) = 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))
+> -	if ((l & 0xf000) == 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))
 > -		return 1ul << 16;		/* 64k page */
-> -	if ((l & 0xff000) = 0)
+> -	if ((l & 0xff000) == 0)
 > -		return 1ul << 24;		/* 16M page */
 > -	return 0;				/* error */
 > +		return 1ul << 12;
diff --git a/a/content_digest b/N1/content_digest
index c6eaee0..6866608 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,7 +1,7 @@
  "ref\01399224616-25142-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com\0"
  "From\0Alexander Graf <agraf@suse.de>\0"
  "Subject\0Re: [RFC PATCH] KVM: PPC: BOOK3S: HV: THP support for guest\0"
- "Date\0Tue, 06 May 2014 09:12:45 +0000\0"
+ "Date\0Tue, 06 May 2014 11:12:45 +0200\0"
  "To\0Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>\0"
  "Cc\0paulus@samba.org"
   linuxppc-dev@lists.ozlabs.org
@@ -21,7 +21,7 @@
  "> --- a/arch/powerpc/include/asm/kvm_book3s_64.h\n"
  "> +++ b/arch/powerpc/include/asm/kvm_book3s_64.h\n"
  "> @@ -77,34 +77,122 @@ static inline long try_lock_hpte(unsigned long *hpte, unsigned long bits)\n"
- ">   \treturn old = 0;\n"
+ ">   \treturn old == 0;\n"
  ">   }\n"
  ">   \n"
  "> +static inline int __hpte_actual_psize(unsigned int lp, int psize)\n"
@@ -33,22 +33,22 @@
  "> +\tfor (i = 1; i < MMU_PAGE_COUNT; i++) {\n"
  "> +\n"
  "> +\t\t/* invalid penc */\n"
- "> +\t\tif (mmu_psize_defs[psize].penc[i] = -1)\n"
+ "> +\t\tif (mmu_psize_defs[psize].penc[i] == -1)\n"
  "> +\t\t\tcontinue;\n"
  "> +\t\t/*\n"
  "> +\t\t * encoding bits per actual page size\n"
  "> +\t\t *        PTE LP     actual page size\n"
  "> +\t\t *    rrrr rrrz\t\t>=8KB\n"
- "> +\t\t *    rrrr rrzz\t\t>\026KB\n"
- "> +\t\t *    rrrr rzzz\t\t>2KB\n"
- "> +\t\t *    rrrr zzzz\t\t>dKB\n"
+ "> +\t\t *    rrrr rrzz\t\t>=16KB\n"
+ "> +\t\t *    rrrr rzzz\t\t>=32KB\n"
+ "> +\t\t *    rrrr zzzz\t\t>=64KB\n"
  "> +\t\t * .......\n"
  "> +\t\t */\n"
  "> +\t\tshift = mmu_psize_defs[i].shift - LP_SHIFT;\n"
  "> +\t\tif (shift > LP_BITS)\n"
  "> +\t\t\tshift = LP_BITS;\n"
  "> +\t\tmask = (1 << shift) - 1;\n"
- "> +\t\tif ((lp & mask) = mmu_psize_defs[psize].penc[i])\n"
+ "> +\t\tif ((lp & mask) == mmu_psize_defs[psize].penc[i])\n"
  "> +\t\t\treturn i;\n"
  "> +\t}\n"
  "> +\treturn -1;\n"
@@ -171,9 +171,9 @@
  ">   \t/* only handle 4k, 64k and 16M pages for now */\n"
  ">   \tif (!(h & HPTE_V_LARGE))\n"
  "> -\t\treturn 1ul << 12;\t\t/* 4k page */\n"
- "> -\tif ((l & 0xf000) = 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))\n"
+ "> -\tif ((l & 0xf000) == 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))\n"
  "> -\t\treturn 1ul << 16;\t\t/* 64k page */\n"
- "> -\tif ((l & 0xff000) = 0)\n"
+ "> -\tif ((l & 0xff000) == 0)\n"
  "> -\t\treturn 1ul << 24;\t\t/* 16M page */\n"
  "> -\treturn 0;\t\t\t\t/* error */\n"
  "> +\t\treturn 1ul << 12;\n"
@@ -230,4 +230,4 @@
  "\n"
  Alex
 
-cfe78d405f11080972e25c763ea08f54fe1dc208f05ba3e0f2d708c54288bf5a
+f0d71d00afb9d55b33daebca3348c3c4c2bb2b977a64457fb44011ae78df2518

diff --git a/a/1.txt b/N2/1.txt
index 51367bf..2910cff 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -10,7 +10,7 @@ On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
 > --- a/arch/powerpc/include/asm/kvm_book3s_64.h
 > +++ b/arch/powerpc/include/asm/kvm_book3s_64.h
 > @@ -77,34 +77,122 @@ static inline long try_lock_hpte(unsigned long *hpte, unsigned long bits)
->   	return old = 0;
+>   	return old == 0;
 >   }
 >   
 > +static inline int __hpte_actual_psize(unsigned int lp, int psize)
@@ -22,22 +22,22 @@ On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
 > +	for (i = 1; i < MMU_PAGE_COUNT; i++) {
 > +
 > +		/* invalid penc */
-> +		if (mmu_psize_defs[psize].penc[i] = -1)
+> +		if (mmu_psize_defs[psize].penc[i] == -1)
 > +			continue;
 > +		/*
 > +		 * encoding bits per actual page size
 > +		 *        PTE LP     actual page size
 > +		 *    rrrr rrrz		>=8KB
-> +		 *    rrrr rrzz		>\x16KB
-> +		 *    rrrr rzzz		>2KB
-> +		 *    rrrr zzzz		>dKB
+> +		 *    rrrr rrzz		>=16KB
+> +		 *    rrrr rzzz		>=32KB
+> +		 *    rrrr zzzz		>=64KB
 > +		 * .......
 > +		 */
 > +		shift = mmu_psize_defs[i].shift - LP_SHIFT;
 > +		if (shift > LP_BITS)
 > +			shift = LP_BITS;
 > +		mask = (1 << shift) - 1;
-> +		if ((lp & mask) = mmu_psize_defs[psize].penc[i])
+> +		if ((lp & mask) == mmu_psize_defs[psize].penc[i])
 > +			return i;
 > +	}
 > +	return -1;
@@ -160,9 +160,9 @@ On 05/04/2014 07:30 PM, Aneesh Kumar K.V wrote:
 >   	/* only handle 4k, 64k and 16M pages for now */
 >   	if (!(h & HPTE_V_LARGE))
 > -		return 1ul << 12;		/* 4k page */
-> -	if ((l & 0xf000) = 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))
+> -	if ((l & 0xf000) == 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))
 > -		return 1ul << 16;		/* 64k page */
-> -	if ((l & 0xff000) = 0)
+> -	if ((l & 0xff000) == 0)
 > -		return 1ul << 24;		/* 16M page */
 > -	return 0;				/* error */
 > +		return 1ul << 12;
@@ -218,3 +218,8 @@ Can we also ensure that every system we run on can do MPSS?
 
 
 Alex
+
+_______________________________________________
+Linuxppc-dev mailing list
+Linuxppc-dev@lists.ozlabs.org
+https://lists.ozlabs.org/listinfo/linuxppc-dev
diff --git a/a/content_digest b/N2/content_digest
index c6eaee0..969cb4d 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,7 +1,7 @@
  "ref\01399224616-25142-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com\0"
  "From\0Alexander Graf <agraf@suse.de>\0"
  "Subject\0Re: [RFC PATCH] KVM: PPC: BOOK3S: HV: THP support for guest\0"
- "Date\0Tue, 06 May 2014 09:12:45 +0000\0"
+ "Date\0Tue, 06 May 2014 11:12:45 +0200\0"
  "To\0Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>\0"
  "Cc\0paulus@samba.org"
   linuxppc-dev@lists.ozlabs.org
@@ -21,7 +21,7 @@
  "> --- a/arch/powerpc/include/asm/kvm_book3s_64.h\n"
  "> +++ b/arch/powerpc/include/asm/kvm_book3s_64.h\n"
  "> @@ -77,34 +77,122 @@ static inline long try_lock_hpte(unsigned long *hpte, unsigned long bits)\n"
- ">   \treturn old = 0;\n"
+ ">   \treturn old == 0;\n"
  ">   }\n"
  ">   \n"
  "> +static inline int __hpte_actual_psize(unsigned int lp, int psize)\n"
@@ -33,22 +33,22 @@
  "> +\tfor (i = 1; i < MMU_PAGE_COUNT; i++) {\n"
  "> +\n"
  "> +\t\t/* invalid penc */\n"
- "> +\t\tif (mmu_psize_defs[psize].penc[i] = -1)\n"
+ "> +\t\tif (mmu_psize_defs[psize].penc[i] == -1)\n"
  "> +\t\t\tcontinue;\n"
  "> +\t\t/*\n"
  "> +\t\t * encoding bits per actual page size\n"
  "> +\t\t *        PTE LP     actual page size\n"
  "> +\t\t *    rrrr rrrz\t\t>=8KB\n"
- "> +\t\t *    rrrr rrzz\t\t>\026KB\n"
- "> +\t\t *    rrrr rzzz\t\t>2KB\n"
- "> +\t\t *    rrrr zzzz\t\t>dKB\n"
+ "> +\t\t *    rrrr rrzz\t\t>=16KB\n"
+ "> +\t\t *    rrrr rzzz\t\t>=32KB\n"
+ "> +\t\t *    rrrr zzzz\t\t>=64KB\n"
  "> +\t\t * .......\n"
  "> +\t\t */\n"
  "> +\t\tshift = mmu_psize_defs[i].shift - LP_SHIFT;\n"
  "> +\t\tif (shift > LP_BITS)\n"
  "> +\t\t\tshift = LP_BITS;\n"
  "> +\t\tmask = (1 << shift) - 1;\n"
- "> +\t\tif ((lp & mask) = mmu_psize_defs[psize].penc[i])\n"
+ "> +\t\tif ((lp & mask) == mmu_psize_defs[psize].penc[i])\n"
  "> +\t\t\treturn i;\n"
  "> +\t}\n"
  "> +\treturn -1;\n"
@@ -171,9 +171,9 @@
  ">   \t/* only handle 4k, 64k and 16M pages for now */\n"
  ">   \tif (!(h & HPTE_V_LARGE))\n"
  "> -\t\treturn 1ul << 12;\t\t/* 4k page */\n"
- "> -\tif ((l & 0xf000) = 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))\n"
+ "> -\tif ((l & 0xf000) == 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206))\n"
  "> -\t\treturn 1ul << 16;\t\t/* 64k page */\n"
- "> -\tif ((l & 0xff000) = 0)\n"
+ "> -\tif ((l & 0xff000) == 0)\n"
  "> -\t\treturn 1ul << 24;\t\t/* 16M page */\n"
  "> -\treturn 0;\t\t\t\t/* error */\n"
  "> +\t\treturn 1ul << 12;\n"
@@ -228,6 +228,11 @@
  "Can we also ensure that every system we run on can do MPSS?\n"
  "\n"
  "\n"
- Alex
+ "Alex\n"
+ "\n"
+ "_______________________________________________\n"
+ "Linuxppc-dev mailing list\n"
+ "Linuxppc-dev@lists.ozlabs.org\n"
+ https://lists.ozlabs.org/listinfo/linuxppc-dev
 
-cfe78d405f11080972e25c763ea08f54fe1dc208f05ba3e0f2d708c54288bf5a
+0998cb48700a9ef493e977d6f019405a8ecddc49df16aa44e80fd7b35d095c48

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