From mboxrd@z Thu Jan 1 00:00:00 1970 From: Marc Zyngier Subject: Re: [PATCH v4 9/9] kvmtool: virtio: enable arm/arm64 support for bi-endianness Date: Thu, 08 May 2014 11:15:28 +0100 Message-ID: <536B5940.2050709@arm.com> References: <1399541568-13803-1-git-send-email-marc.zyngier@arm.com> <1399541568-13803-10-git-send-email-marc.zyngier@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Cc: "kvmarm@lists.cs.columbia.edu" , kvm-devel , Pekka Enberg , Will Deacon To: Peter Maydell Return-path: Received: from fw-tnat.austin.arm.com ([217.140.110.23]:54504 "EHLO collaborate-mta1.arm.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751009AbaEHKPk (ORCPT ); Thu, 8 May 2014 06:15:40 -0400 In-Reply-To: Sender: kvm-owner@vger.kernel.org List-ID: On 08/05/14 11:06, Peter Maydell wrote: > On 8 May 2014 10:32, Marc Zyngier wrote: >> +int kvm_cpu__get_endianness(struct kvm_cpu *vcpu) >> +{ >> + struct kvm_one_reg reg; >> + u64 psr; >> + u64 sctlr; >> + >> + /* >> + * Quoting the definition given by Peter Maydell: >> + * >> + * "Endianness of the CPU which does the virtio reset at the >> + * point when it does that reset" >> + * >> + * We first check for an AArch32 guest: its endianness can >> + * change when using SETEND, which affects the CPSR.E bit. >> + * >> + * If we're AArch64, use SCTLR_EL1.E0E if access comes from >> + * EL0, and SCTLR_EL1.EE if access comes from EL1. >> + */ > > I note that the set of checks described here match the logic > of the ARM ARM BigEndian() pseudocode function, which is > a good sign. Pure luck. Or maybe I'm now going slightly mad. Either way, consistency is good... ;-) Thanks, M. -- Jazz is not dead. It just smells funny...