From mboxrd@z Thu Jan 1 00:00:00 1970 From: Nishanth Menon Subject: Re: [PATCH] ARM: dts: am335x-bone-common: Add i2c2 definition Date: Fri, 9 May 2014 07:57:53 -0500 Message-ID: <536CD0D1.4080903@ti.com> References: <1399614983-552-1-git-send-email-mranostay@gmail.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1399614983-552-1-git-send-email-mranostay-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Matt Ranostay Cc: linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, pantelis.antoniou-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, matt.porter-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org List-Id: linux-omap@vger.kernel.org On Fri 09 May 2014 12:56:23 AM CDT, Matt Ranostay wrote: > Add missing i2c2 bus define to access various cape and > prototype/breakout board devices. > > Signed-off-by: Matt Ranostay > --- > arch/arm/boot/dts/am335x-bone-common.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi > index 2e7d932..2aedfee 100644 > --- a/arch/arm/boot/dts/am335x-bone-common.dtsi > +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi > @@ -84,6 +84,13 @@ > >; > }; > > + i2c2_pins: pinmux_i2c2_pins { > + pinctrl-single,pins = < > + 0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* i2c2_sda.uart1_ctsn */ > + 0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* i2c2_scl.uart1_rtsn */ I dont understand the comment -> i2c2_sda is being muxed to uart1_cstsn? > + >; > + }; > + > uart0_pins: pinmux_uart0_pins { > pinctrl-single,pins = < > 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ > @@ -222,6 +229,15 @@ > > }; > > + > +&i2c2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c2_pins>; > + > + status = "okay"; > + clock-frequency = <400000>; How did we decide on 400KHz -> do all all i2c2 devices on ALL capes work in full speed? OR should we consider a conservative 100KHz? > +}; > + > /include/ "tps65217.dtsi" > > &tps { -- Regards, Nishanth Menon -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756565AbaEIM6J (ORCPT ); Fri, 9 May 2014 08:58:09 -0400 Received: from bear.ext.ti.com ([192.94.94.41]:51264 "EHLO bear.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756386AbaEIM6G (ORCPT ); Fri, 9 May 2014 08:58:06 -0400 Message-ID: <536CD0D1.4080903@ti.com> Date: Fri, 9 May 2014 07:57:53 -0500 From: Nishanth Menon User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 MIME-Version: 1.0 To: Matt Ranostay CC: , , , , , , , Subject: Re: [PATCH] ARM: dts: am335x-bone-common: Add i2c2 definition References: <1399614983-552-1-git-send-email-mranostay@gmail.com> In-Reply-To: <1399614983-552-1-git-send-email-mranostay@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri 09 May 2014 12:56:23 AM CDT, Matt Ranostay wrote: > Add missing i2c2 bus define to access various cape and > prototype/breakout board devices. > > Signed-off-by: Matt Ranostay > --- > arch/arm/boot/dts/am335x-bone-common.dtsi | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi > index 2e7d932..2aedfee 100644 > --- a/arch/arm/boot/dts/am335x-bone-common.dtsi > +++ b/arch/arm/boot/dts/am335x-bone-common.dtsi > @@ -84,6 +84,13 @@ > >; > }; > > + i2c2_pins: pinmux_i2c2_pins { > + pinctrl-single,pins = < > + 0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* i2c2_sda.uart1_ctsn */ > + 0x17c (PIN_INPUT_PULLUP | MUX_MODE3) /* i2c2_scl.uart1_rtsn */ I dont understand the comment -> i2c2_sda is being muxed to uart1_cstsn? > + >; > + }; > + > uart0_pins: pinmux_uart0_pins { > pinctrl-single,pins = < > 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */ > @@ -222,6 +229,15 @@ > > }; > > + > +&i2c2 { > + pinctrl-names = "default"; > + pinctrl-0 = <&i2c2_pins>; > + > + status = "okay"; > + clock-frequency = <400000>; How did we decide on 400KHz -> do all all i2c2 devices on ALL capes work in full speed? OR should we consider a conservative 100KHz? > +}; > + > /include/ "tps65217.dtsi" > > &tps { -- Regards, Nishanth Menon