Re: [PATCH v3] hw/passthrough: Prevent QEMU from mapping PCI option ROM at address 0

[Malcolm Crossley <malcolm.crossley@citrix.com>]

On 12/05/14 15:53, Jan Beulich wrote:
>>>> On 12.05.14 at 16:37, <malcolm.crossley@citrix.com> wrote:
>> The PCI option ROM BAR uses the LSB to indicate if the BAR is enabled.
>> The AMD graphics driver sets the address bit's of the BAR to 0 but leaves the
>> LSB set to 1. Whilst this is not good practice, QEMU should be ignoring the
>> non address parts of the BAR.
>>
>> This patch adds masking of the bits 0-10 (4k page) parts of the BAR
>> before comparing the address to 0.
> 
> Sorry, but to avoid confusing (future) readers - this is 2k units, not
> 4k pages.
> 
Thanks for pointing that out Jan, I was actually intending to ensure
nothing is allowed to be mapped to the 0 page and did not realise the
option ROM BAR is 2k aligned instead of 4k. I will submit a new patch
using XC_PAGE_MASK instead.

>> Signed-off-by: Malcolm Crossley <malcolm.crossley@citrix.com>
> 
> With the description corrected:
> Reviewed-by: Jan Beulich <jbeulich@suse.com>
> 
>