diff for duplicates of <5371271C.9010302@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 380b43f..f992a9c 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,20 +3,20 @@ On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote: > nodes for Berlin SoCs. Also add a binding include to ease core clock > references. > -> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> +> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > --- -> Cc: Mike Turquette <mturquette@linaro.org> -> Cc: Rob Herring <robh+dt@kernel.org> -> Cc: Pawel Moll <pawel.moll@arm.com> -> Cc: Mark Rutland <mark.rutland@arm.com> -> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> -> Cc: Kumar Gala <galak@codeaurora.org> -> Cc: Russell King <linux@arm.linux.org.uk> -> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> -> Cc: Antoine Tenart <antoine.tenart@free-electrons.com> -> Cc: devicetree at vger.kernel.org -> Cc: linux-arm-kernel at lists.infradead.org -> Cc: linux-kernel at vger.kernel.org +> Cc: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> +> Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> +> Cc: Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> +> Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> +> Cc: Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> +> Cc: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> +> Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> +> Cc: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> +> Cc: Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> +> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org +> Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > --- > arch/arm/boot/dts/berlin2cd.dtsi | 198 +++++++++++++++++++++++++++++++----- > drivers/clk/berlin/Makefile | 2 + @@ -86,7 +86,7 @@ Sebastian > + clocks = <&twdclk>; > }; > -> apb at e80000 { +> apb@e80000 { > @@ -91,7 +86,7 @@ > compatible = "snps,dw-apb-timer"; > reg = <0x2c00 0x14>; @@ -163,35 +163,35 @@ Sebastian > }; > }; > -> + syspll: pll at ea0014 { +> + syspll: pll@ea0014 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0014 0x14>; > + clocks = <&refclk>; > + }; > + -> + mempll: pll at ea0028 { +> + mempll: pll@ea0028 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0028 0x14>; > + clocks = <&refclk>; > + }; > + -> + cpupll: pll at ea003c { +> + cpupll: pll@ea003c { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea003c 0x14>; > + clocks = <&refclk>; > + }; > + -> + avpll: pll at ea0040 { +> + avpll: pll@ea0040 { > + compatible = "marvell,berlin2-avpll"; > + #clock-cells = <2>; > + reg = <0xea0050 0x100>; > + clocks = <&refclk>; > + }; > + -> + coreclk: clock at ea0150 { +> + coreclk: clock@ea0150 { > + compatible = "marvell,berlin2-core-clocks"; > + #clock-cells = <1>; > + reg = <0xea0150 0x1c>; @@ -211,7 +211,7 @@ Sebastian > + "avpll_b5", "avpll_b6", "avpll_b7", "avpll_b8"; > + }; > + -> + gfx3dcore_clk: clock at ea022c { +> + gfx3dcore_clk: clock@ea022c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0022c 0x4>; @@ -222,7 +222,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dsys_clk: clock at ea0230 { +> + gfx3dsys_clk: clock@ea0230 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00230 0x4>; @@ -233,7 +233,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + arc_clk: clock at ea0234 { +> + arc_clk: clock@ea0234 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00234 0x4>; @@ -244,7 +244,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + vip_clk: clock at ea0238 { +> + vip_clk: clock@ea0238 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00238 0x4>; @@ -255,7 +255,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio0xin_clk: clock at ea023c { +> + sdio0xin_clk: clock@ea023c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0023c 0x4>; @@ -266,7 +266,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio1xin_clk: clock at ea0240 { +> + sdio1xin_clk: clock@ea0240 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00240 0x4>; @@ -277,7 +277,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dextra_clk: clock at ea0244 { +> + gfx3dextra_clk: clock@ea0244 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00244 0x4>; @@ -288,7 +288,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gc360_clk: clock at ea024c { +> + gc360_clk: clock@ea024c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0024c 0x4>; @@ -299,7 +299,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio_dllmst_clk: clock at ea0250 { +> + sdio_dllmst_clk: clock@ea0250 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00250 0x4>; @@ -310,7 +310,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> apb at fc0000 { +> apb@fc0000 { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -183,7 +325,7 @@ @@ -380,4 +380,9 @@ Sebastian > +#define CLKID_VIDEO0 28 > +#define CLKID_VIDEO1 29 > +#define CLKID_VIDEO2 30 -> +> + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index b66ef0b..95dec87 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,21 @@ "ref\01399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01399839881-29895-8-git-send-email-sebastian.hesselbarth@gmail.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" + "ref\01399839881-29895-8-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Subject\0Re: [PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" "Date\0Mon, 12 May 2014 21:55:08 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "Cc\0Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> + Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> + Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> + Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> + Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> + Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> + Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" "\00:1\0" "b\0" "On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote:\n" @@ -11,20 +23,20 @@ "> nodes for Berlin SoCs. Also add a binding include to ease core clock\n" "> references.\n" "> \n" - "> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\n" + "> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" "> ---\n" - "> Cc: Mike Turquette <mturquette@linaro.org>\n" - "> Cc: Rob Herring <robh+dt@kernel.org>\n" - "> Cc: Pawel Moll <pawel.moll@arm.com>\n" - "> Cc: Mark Rutland <mark.rutland@arm.com>\n" - "> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>\n" - "> Cc: Kumar Gala <galak@codeaurora.org>\n" - "> Cc: Russell King <linux@arm.linux.org.uk>\n" - "> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>\n" - "> Cc: Antoine Tenart <antoine.tenart@free-electrons.com>\n" - "> Cc: devicetree at vger.kernel.org\n" - "> Cc: linux-arm-kernel at lists.infradead.org\n" - "> Cc: linux-kernel at vger.kernel.org\n" + "> Cc: Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>\n" + "> Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\n" + "> Cc: Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>\n" + "> Cc: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>\n" + "> Cc: Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>\n" + "> Cc: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>\n" + "> Cc: Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>\n" + "> Cc: Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>\n" + "> Cc: Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>\n" + "> Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + "> Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\n" + "> Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" "> ---\n" "> arch/arm/boot/dts/berlin2cd.dtsi | 198 +++++++++++++++++++++++++++++++-----\n" "> drivers/clk/berlin/Makefile | 2 +\n" @@ -94,7 +106,7 @@ "> +\t\t\tclocks = <&twdclk>;\n" "> \t\t};\n" "> \n" - "> \t\tapb at e80000 {\n" + "> \t\tapb@e80000 {\n" "> @@ -91,7 +86,7 @@\n" "> \t\t\t\tcompatible = \"snps,dw-apb-timer\";\n" "> \t\t\t\treg = <0x2c00 0x14>;\n" @@ -171,35 +183,35 @@ "> \t\t\t};\n" "> \t\t};\n" "> \n" - "> +\t\tsyspll: pll at ea0014 {\n" + "> +\t\tsyspll: pll@ea0014 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0014 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tmempll: pll at ea0028 {\n" + "> +\t\tmempll: pll@ea0028 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0028 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpupll: pll at ea003c {\n" + "> +\t\tcpupll: pll@ea003c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea003c 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tavpll: pll at ea0040 {\n" + "> +\t\tavpll: pll@ea0040 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-avpll\";\n" "> +\t\t\t#clock-cells = <2>;\n" "> +\t\t\treg = <0xea0050 0x100>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcoreclk: clock at ea0150 {\n" + "> +\t\tcoreclk: clock@ea0150 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-core-clocks\";\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\treg = <0xea0150 0x1c>;\n" @@ -219,7 +231,7 @@ "> +\t\t\t\t\"avpll_b5\", \"avpll_b6\", \"avpll_b7\", \"avpll_b8\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dcore_clk: clock at ea022c {\n" + "> +\t\tgfx3dcore_clk: clock@ea022c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0022c 0x4>;\n" @@ -230,7 +242,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dsys_clk: clock at ea0230 {\n" + "> +\t\tgfx3dsys_clk: clock@ea0230 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00230 0x4>;\n" @@ -241,7 +253,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tarc_clk: clock at ea0234 {\n" + "> +\t\tarc_clk: clock@ea0234 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00234 0x4>;\n" @@ -252,7 +264,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tvip_clk: clock at ea0238 {\n" + "> +\t\tvip_clk: clock@ea0238 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00238 0x4>;\n" @@ -263,7 +275,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio0xin_clk: clock at ea023c {\n" + "> +\t\tsdio0xin_clk: clock@ea023c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0023c 0x4>;\n" @@ -274,7 +286,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio1xin_clk: clock at ea0240 {\n" + "> +\t\tsdio1xin_clk: clock@ea0240 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00240 0x4>;\n" @@ -285,7 +297,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dextra_clk: clock at ea0244 {\n" + "> +\t\tgfx3dextra_clk: clock@ea0244 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00244 0x4>;\n" @@ -296,7 +308,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgc360_clk: clock at ea024c {\n" + "> +\t\tgc360_clk: clock@ea024c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0024c 0x4>;\n" @@ -307,7 +319,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio_dllmst_clk: clock at ea0250 {\n" + "> +\t\tsdio_dllmst_clk: clock@ea0250 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00250 0x4>;\n" @@ -318,7 +330,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> \t\tapb at fc0000 {\n" + "> \t\tapb@fc0000 {\n" "> \t\t\tcompatible = \"simple-bus\";\n" "> \t\t\t#address-cells = <1>;\n" "> @@ -183,7 +325,7 @@\n" @@ -388,6 +400,11 @@ "> +#define CLKID_VIDEO0\t\t28\n" "> +#define CLKID_VIDEO1\t\t29\n" "> +#define CLKID_VIDEO2\t\t30\n" - > + "> \n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -f53db68b2744979497bf02e45a41e6bb8d8bc9986a9acf11ee1c31ba3a908d44 +f8b81481749e28f094af73b4ffee67554c0f0598c346c7a8658373406774e873
diff --git a/a/1.txt b/N2/1.txt index 380b43f..7197678 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -14,9 +14,9 @@ On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote: > Cc: Russell King <linux@arm.linux.org.uk> > Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com> > Cc: Antoine Tenart <antoine.tenart@free-electrons.com> -> Cc: devicetree at vger.kernel.org -> Cc: linux-arm-kernel at lists.infradead.org -> Cc: linux-kernel at vger.kernel.org +> Cc: devicetree@vger.kernel.org +> Cc: linux-arm-kernel@lists.infradead.org +> Cc: linux-kernel@vger.kernel.org > --- > arch/arm/boot/dts/berlin2cd.dtsi | 198 +++++++++++++++++++++++++++++++----- > drivers/clk/berlin/Makefile | 2 + @@ -86,7 +86,7 @@ Sebastian > + clocks = <&twdclk>; > }; > -> apb at e80000 { +> apb@e80000 { > @@ -91,7 +86,7 @@ > compatible = "snps,dw-apb-timer"; > reg = <0x2c00 0x14>; @@ -163,35 +163,35 @@ Sebastian > }; > }; > -> + syspll: pll at ea0014 { +> + syspll: pll@ea0014 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0014 0x14>; > + clocks = <&refclk>; > + }; > + -> + mempll: pll at ea0028 { +> + mempll: pll@ea0028 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0028 0x14>; > + clocks = <&refclk>; > + }; > + -> + cpupll: pll at ea003c { +> + cpupll: pll@ea003c { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea003c 0x14>; > + clocks = <&refclk>; > + }; > + -> + avpll: pll at ea0040 { +> + avpll: pll@ea0040 { > + compatible = "marvell,berlin2-avpll"; > + #clock-cells = <2>; > + reg = <0xea0050 0x100>; > + clocks = <&refclk>; > + }; > + -> + coreclk: clock at ea0150 { +> + coreclk: clock@ea0150 { > + compatible = "marvell,berlin2-core-clocks"; > + #clock-cells = <1>; > + reg = <0xea0150 0x1c>; @@ -211,7 +211,7 @@ Sebastian > + "avpll_b5", "avpll_b6", "avpll_b7", "avpll_b8"; > + }; > + -> + gfx3dcore_clk: clock at ea022c { +> + gfx3dcore_clk: clock@ea022c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0022c 0x4>; @@ -222,7 +222,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dsys_clk: clock at ea0230 { +> + gfx3dsys_clk: clock@ea0230 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00230 0x4>; @@ -233,7 +233,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + arc_clk: clock at ea0234 { +> + arc_clk: clock@ea0234 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00234 0x4>; @@ -244,7 +244,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + vip_clk: clock at ea0238 { +> + vip_clk: clock@ea0238 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00238 0x4>; @@ -255,7 +255,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio0xin_clk: clock at ea023c { +> + sdio0xin_clk: clock@ea023c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0023c 0x4>; @@ -266,7 +266,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio1xin_clk: clock at ea0240 { +> + sdio1xin_clk: clock@ea0240 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00240 0x4>; @@ -277,7 +277,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dextra_clk: clock at ea0244 { +> + gfx3dextra_clk: clock@ea0244 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00244 0x4>; @@ -288,7 +288,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gc360_clk: clock at ea024c { +> + gc360_clk: clock@ea024c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0024c 0x4>; @@ -299,7 +299,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio_dllmst_clk: clock at ea0250 { +> + sdio_dllmst_clk: clock@ea0250 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00250 0x4>; @@ -310,7 +310,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> apb at fc0000 { +> apb@fc0000 { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -183,7 +325,7 @@ diff --git a/a/content_digest b/N2/content_digest index b66ef0b..a1a2a9a 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,9 +1,21 @@ "ref\01399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01399839881-29895-8-git-send-email-sebastian.hesselbarth@gmail.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" "Date\0Mon, 12 May 2014 21:55:08 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0unlisted-recipients:; (no To-header on input)\0" + "Cc\0Mike Turquette <mturquette@linaro.org>" + Rob Herring <robh+dt@kernel.org> + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Russell King <linux@arm.linux.org.uk> + Alexandre Belloni <alexandre.belloni@free-electrons.com> + Antoine Tenart <antoine.tenart@free-electrons.com> + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote:\n" @@ -22,9 +34,9 @@ "> Cc: Russell King <linux@arm.linux.org.uk>\n" "> Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>\n" "> Cc: Antoine Tenart <antoine.tenart@free-electrons.com>\n" - "> Cc: devicetree at vger.kernel.org\n" - "> Cc: linux-arm-kernel at lists.infradead.org\n" - "> Cc: linux-kernel at vger.kernel.org\n" + "> Cc: devicetree@vger.kernel.org\n" + "> Cc: linux-arm-kernel@lists.infradead.org\n" + "> Cc: linux-kernel@vger.kernel.org\n" "> ---\n" "> arch/arm/boot/dts/berlin2cd.dtsi | 198 +++++++++++++++++++++++++++++++-----\n" "> drivers/clk/berlin/Makefile | 2 +\n" @@ -94,7 +106,7 @@ "> +\t\t\tclocks = <&twdclk>;\n" "> \t\t};\n" "> \n" - "> \t\tapb at e80000 {\n" + "> \t\tapb@e80000 {\n" "> @@ -91,7 +86,7 @@\n" "> \t\t\t\tcompatible = \"snps,dw-apb-timer\";\n" "> \t\t\t\treg = <0x2c00 0x14>;\n" @@ -171,35 +183,35 @@ "> \t\t\t};\n" "> \t\t};\n" "> \n" - "> +\t\tsyspll: pll at ea0014 {\n" + "> +\t\tsyspll: pll@ea0014 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0014 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tmempll: pll at ea0028 {\n" + "> +\t\tmempll: pll@ea0028 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0028 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpupll: pll at ea003c {\n" + "> +\t\tcpupll: pll@ea003c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea003c 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tavpll: pll at ea0040 {\n" + "> +\t\tavpll: pll@ea0040 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-avpll\";\n" "> +\t\t\t#clock-cells = <2>;\n" "> +\t\t\treg = <0xea0050 0x100>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcoreclk: clock at ea0150 {\n" + "> +\t\tcoreclk: clock@ea0150 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-core-clocks\";\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\treg = <0xea0150 0x1c>;\n" @@ -219,7 +231,7 @@ "> +\t\t\t\t\"avpll_b5\", \"avpll_b6\", \"avpll_b7\", \"avpll_b8\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dcore_clk: clock at ea022c {\n" + "> +\t\tgfx3dcore_clk: clock@ea022c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0022c 0x4>;\n" @@ -230,7 +242,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dsys_clk: clock at ea0230 {\n" + "> +\t\tgfx3dsys_clk: clock@ea0230 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00230 0x4>;\n" @@ -241,7 +253,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tarc_clk: clock at ea0234 {\n" + "> +\t\tarc_clk: clock@ea0234 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00234 0x4>;\n" @@ -252,7 +264,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tvip_clk: clock at ea0238 {\n" + "> +\t\tvip_clk: clock@ea0238 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00238 0x4>;\n" @@ -263,7 +275,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio0xin_clk: clock at ea023c {\n" + "> +\t\tsdio0xin_clk: clock@ea023c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0023c 0x4>;\n" @@ -274,7 +286,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio1xin_clk: clock at ea0240 {\n" + "> +\t\tsdio1xin_clk: clock@ea0240 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00240 0x4>;\n" @@ -285,7 +297,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dextra_clk: clock at ea0244 {\n" + "> +\t\tgfx3dextra_clk: clock@ea0244 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00244 0x4>;\n" @@ -296,7 +308,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgc360_clk: clock at ea024c {\n" + "> +\t\tgc360_clk: clock@ea024c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0024c 0x4>;\n" @@ -307,7 +319,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio_dllmst_clk: clock at ea0250 {\n" + "> +\t\tsdio_dllmst_clk: clock@ea0250 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00250 0x4>;\n" @@ -318,7 +330,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> \t\tapb at fc0000 {\n" + "> \t\tapb@fc0000 {\n" "> \t\t\tcompatible = \"simple-bus\";\n" "> \t\t\t#address-cells = <1>;\n" "> @@ -183,7 +325,7 @@\n" @@ -390,4 +402,4 @@ "> +#define CLKID_VIDEO2\t\t30\n" > -f53db68b2744979497bf02e45a41e6bb8d8bc9986a9acf11ee1c31ba3a908d44 +9f29429b60e58cb178a949d7cf1f1c05f91b1bf66ea4c999e1141b7e07b82cce
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