diff for duplicates of <5371DAE5.2010400@gmail.com> diff --git a/a/1.txt b/N1/1.txt index b4fe0f4..8a35f34 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,7 +3,7 @@ On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote: > nodes for Berlin SoCs. Also add a binding include to ease core clock > references. > -> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> +> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> > --- [...] > diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi @@ -15,35 +15,35 @@ On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote: > }; > }; > -> + syspll: pll at ea0014 { +> + syspll: pll@ea0014 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0014 0x14>; > + clocks = <&refclk>; > + }; > + -> + mempll: pll at ea0028 { +> + mempll: pll@ea0028 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0028 0x14>; > + clocks = <&refclk>; > + }; > + -> + cpupll: pll at ea003c { +> + cpupll: pll@ea003c { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea003c 0x14>; > + clocks = <&refclk>; > + }; > + -> + avpll: pll at ea0040 { +> + avpll: pll@ea0040 { > + compatible = "marvell,berlin2-avpll"; > + #clock-cells = <2>; > + reg = <0xea0050 0x100>; > + clocks = <&refclk>; > + }; > + -> + coreclk: clock at ea0150 { +> + coreclk: clock@ea0150 { > + compatible = "marvell,berlin2-core-clocks"; > + #clock-cells = <1>; > + reg = <0xea0150 0x1c>; @@ -63,7 +63,7 @@ On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote: > + "avpll_b5", "avpll_b6", "avpll_b7", "avpll_b8"; > + }; > + -> + gfx3dcore_clk: clock at ea022c { +> + gfx3dcore_clk: clock@ea022c { > + compatible = "marvell,berlin2-clk-div"; correct compatible should be "marvell,berlin2-div"... @@ -84,7 +84,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dsys_clk: clock at ea0230 { +> + gfx3dsys_clk: clock@ea0230 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00230 0x4>; @@ -95,7 +95,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + arc_clk: clock at ea0234 { +> + arc_clk: clock@ea0234 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00234 0x4>; @@ -106,7 +106,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + vip_clk: clock at ea0238 { +> + vip_clk: clock@ea0238 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00238 0x4>; @@ -117,7 +117,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio0xin_clk: clock at ea023c { +> + sdio0xin_clk: clock@ea023c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0023c 0x4>; @@ -128,7 +128,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio1xin_clk: clock at ea0240 { +> + sdio1xin_clk: clock@ea0240 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00240 0x4>; @@ -139,7 +139,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dextra_clk: clock at ea0244 { +> + gfx3dextra_clk: clock@ea0244 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00244 0x4>; @@ -150,7 +150,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gc360_clk: clock at ea024c { +> + gc360_clk: clock@ea024c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0024c 0x4>; @@ -161,7 +161,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio_dllmst_clk: clock at ea0250 { +> + sdio_dllmst_clk: clock@ea0250 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00250 0x4>; @@ -172,7 +172,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> apb at fc0000 { +> apb@fc0000 { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -183,7 +325,7 @@ @@ -243,3 +243,8 @@ Sebastian > +#define CLKID_VIDEO1 29 > +#define CLKID_VIDEO2 30 > + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N1/content_digest index c0fe67a..359ea01 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,9 +1,21 @@ "ref\01399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01399839881-29895-8-git-send-email-sebastian.hesselbarth@gmail.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" + "ref\01399839881-29895-8-git-send-email-sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "Subject\0Re: [PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" "Date\0Tue, 13 May 2014 10:42:13 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "Cc\0Mike Turquette <mturquette-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>" + Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> + Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> + Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> + Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> + Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> + Alexandre Belloni <alexandre.belloni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> + Antoine Tenart <antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" "\00:1\0" "b\0" "On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote:\n" @@ -11,7 +23,7 @@ "> nodes for Berlin SoCs. Also add a binding include to ease core clock\n" "> references.\n" ">\n" - "> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\n" + "> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" "> ---\n" "[...]\n" "> diff --git a/arch/arm/boot/dts/berlin2cd.dtsi b/arch/arm/boot/dts/berlin2cd.dtsi\n" @@ -23,35 +35,35 @@ "> \t\t\t};\n" "> \t\t};\n" ">\n" - "> +\t\tsyspll: pll at ea0014 {\n" + "> +\t\tsyspll: pll@ea0014 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0014 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tmempll: pll at ea0028 {\n" + "> +\t\tmempll: pll@ea0028 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0028 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpupll: pll at ea003c {\n" + "> +\t\tcpupll: pll@ea003c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea003c 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tavpll: pll at ea0040 {\n" + "> +\t\tavpll: pll@ea0040 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-avpll\";\n" "> +\t\t\t#clock-cells = <2>;\n" "> +\t\t\treg = <0xea0050 0x100>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcoreclk: clock at ea0150 {\n" + "> +\t\tcoreclk: clock@ea0150 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-core-clocks\";\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\treg = <0xea0150 0x1c>;\n" @@ -71,7 +83,7 @@ "> +\t\t\t\t\"avpll_b5\", \"avpll_b6\", \"avpll_b7\", \"avpll_b8\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dcore_clk: clock at ea022c {\n" + "> +\t\tgfx3dcore_clk: clock@ea022c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "\n" "correct compatible should be \"marvell,berlin2-div\"...\n" @@ -92,7 +104,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dsys_clk: clock at ea0230 {\n" + "> +\t\tgfx3dsys_clk: clock@ea0230 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00230 0x4>;\n" @@ -103,7 +115,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tarc_clk: clock at ea0234 {\n" + "> +\t\tarc_clk: clock@ea0234 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00234 0x4>;\n" @@ -114,7 +126,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tvip_clk: clock at ea0238 {\n" + "> +\t\tvip_clk: clock@ea0238 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00238 0x4>;\n" @@ -125,7 +137,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio0xin_clk: clock at ea023c {\n" + "> +\t\tsdio0xin_clk: clock@ea023c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0023c 0x4>;\n" @@ -136,7 +148,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio1xin_clk: clock at ea0240 {\n" + "> +\t\tsdio1xin_clk: clock@ea0240 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00240 0x4>;\n" @@ -147,7 +159,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dextra_clk: clock at ea0244 {\n" + "> +\t\tgfx3dextra_clk: clock@ea0244 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00244 0x4>;\n" @@ -158,7 +170,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgc360_clk: clock at ea024c {\n" + "> +\t\tgc360_clk: clock@ea024c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0024c 0x4>;\n" @@ -169,7 +181,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio_dllmst_clk: clock at ea0250 {\n" + "> +\t\tsdio_dllmst_clk: clock@ea0250 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00250 0x4>;\n" @@ -180,7 +192,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> \t\tapb at fc0000 {\n" + "> \t\tapb@fc0000 {\n" "> \t\t\tcompatible = \"simple-bus\";\n" "> \t\t\t#address-cells = <1>;\n" "> @@ -183,7 +325,7 @@\n" @@ -250,6 +262,11 @@ "> +#define CLKID_VIDEO0\t\t28\n" "> +#define CLKID_VIDEO1\t\t29\n" "> +#define CLKID_VIDEO2\t\t30\n" - > + ">\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -b7726f5eedae105ca9c03db1412eeff407ef7e571666e3213357a62b41659c5f +540cff2e43d75992b7b75b4f32f76bec2a521658f7514e314e644304548275c2
diff --git a/a/1.txt b/N2/1.txt index b4fe0f4..71456d9 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -15,35 +15,35 @@ On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote: > }; > }; > -> + syspll: pll at ea0014 { +> + syspll: pll@ea0014 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0014 0x14>; > + clocks = <&refclk>; > + }; > + -> + mempll: pll at ea0028 { +> + mempll: pll@ea0028 { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea0028 0x14>; > + clocks = <&refclk>; > + }; > + -> + cpupll: pll at ea003c { +> + cpupll: pll@ea003c { > + compatible = "marvell,berlin2-pll"; > + #clock-cells = <0>; > + reg = <0xea003c 0x14>; > + clocks = <&refclk>; > + }; > + -> + avpll: pll at ea0040 { +> + avpll: pll@ea0040 { > + compatible = "marvell,berlin2-avpll"; > + #clock-cells = <2>; > + reg = <0xea0050 0x100>; > + clocks = <&refclk>; > + }; > + -> + coreclk: clock at ea0150 { +> + coreclk: clock@ea0150 { > + compatible = "marvell,berlin2-core-clocks"; > + #clock-cells = <1>; > + reg = <0xea0150 0x1c>; @@ -63,7 +63,7 @@ On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote: > + "avpll_b5", "avpll_b6", "avpll_b7", "avpll_b8"; > + }; > + -> + gfx3dcore_clk: clock at ea022c { +> + gfx3dcore_clk: clock@ea022c { > + compatible = "marvell,berlin2-clk-div"; correct compatible should be "marvell,berlin2-div"... @@ -84,7 +84,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dsys_clk: clock at ea0230 { +> + gfx3dsys_clk: clock@ea0230 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00230 0x4>; @@ -95,7 +95,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + arc_clk: clock at ea0234 { +> + arc_clk: clock@ea0234 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00234 0x4>; @@ -106,7 +106,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + vip_clk: clock at ea0238 { +> + vip_clk: clock@ea0238 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00238 0x4>; @@ -117,7 +117,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio0xin_clk: clock at ea023c { +> + sdio0xin_clk: clock@ea023c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0023c 0x4>; @@ -128,7 +128,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio1xin_clk: clock at ea0240 { +> + sdio1xin_clk: clock@ea0240 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00240 0x4>; @@ -139,7 +139,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gfx3dextra_clk: clock at ea0244 { +> + gfx3dextra_clk: clock@ea0244 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00244 0x4>; @@ -150,7 +150,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + gc360_clk: clock at ea024c { +> + gc360_clk: clock@ea024c { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea0024c 0x4>; @@ -161,7 +161,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> + sdio_dllmst_clk: clock at ea0250 { +> + sdio_dllmst_clk: clock@ea0250 { > + compatible = "marvell,berlin2-clk-div"; > + #clock-cells = <0>; > + reg = <0xea00250 0x4>; @@ -172,7 +172,7 @@ Sebastian > + "mux0", "mux1", "mux2", "mux3"; > + }; > + -> apb at fc0000 { +> apb@fc0000 { > compatible = "simple-bus"; > #address-cells = <1>; > @@ -183,7 +325,7 @@ diff --git a/a/content_digest b/N2/content_digest index c0fe67a..c7a283c 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,9 +1,21 @@ "ref\01399839881-29895-1-git-send-email-sebastian.hesselbarth@gmail.com\0" "ref\01399839881-29895-8-git-send-email-sebastian.hesselbarth@gmail.com\0" - "From\0sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)\0" - "Subject\0[PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" + "From\0Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" + "Subject\0Re: [PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes\0" "Date\0Tue, 13 May 2014 10:42:13 +0200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0unlisted-recipients:; (no To-header on input)\0" + "Cc\0Mike Turquette <mturquette@linaro.org>" + Rob Herring <robh+dt@kernel.org> + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Russell King <linux@arm.linux.org.uk> + Alexandre Belloni <alexandre.belloni@free-electrons.com> + Antoine Tenart <antoine.tenart@free-electrons.com> + devicetree@vger.kernel.org + linux-arm-kernel@lists.infradead.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote:\n" @@ -23,35 +35,35 @@ "> \t\t\t};\n" "> \t\t};\n" ">\n" - "> +\t\tsyspll: pll at ea0014 {\n" + "> +\t\tsyspll: pll@ea0014 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0014 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tmempll: pll at ea0028 {\n" + "> +\t\tmempll: pll@ea0028 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0028 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpupll: pll at ea003c {\n" + "> +\t\tcpupll: pll@ea003c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-pll\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea003c 0x14>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tavpll: pll at ea0040 {\n" + "> +\t\tavpll: pll@ea0040 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-avpll\";\n" "> +\t\t\t#clock-cells = <2>;\n" "> +\t\t\treg = <0xea0050 0x100>;\n" "> +\t\t\tclocks = <&refclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcoreclk: clock at ea0150 {\n" + "> +\t\tcoreclk: clock@ea0150 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-core-clocks\";\n" "> +\t\t\t#clock-cells = <1>;\n" "> +\t\t\treg = <0xea0150 0x1c>;\n" @@ -71,7 +83,7 @@ "> +\t\t\t\t\"avpll_b5\", \"avpll_b6\", \"avpll_b7\", \"avpll_b8\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dcore_clk: clock at ea022c {\n" + "> +\t\tgfx3dcore_clk: clock@ea022c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "\n" "correct compatible should be \"marvell,berlin2-div\"...\n" @@ -92,7 +104,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dsys_clk: clock at ea0230 {\n" + "> +\t\tgfx3dsys_clk: clock@ea0230 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00230 0x4>;\n" @@ -103,7 +115,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tarc_clk: clock at ea0234 {\n" + "> +\t\tarc_clk: clock@ea0234 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00234 0x4>;\n" @@ -114,7 +126,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tvip_clk: clock at ea0238 {\n" + "> +\t\tvip_clk: clock@ea0238 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00238 0x4>;\n" @@ -125,7 +137,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio0xin_clk: clock at ea023c {\n" + "> +\t\tsdio0xin_clk: clock@ea023c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0023c 0x4>;\n" @@ -136,7 +148,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio1xin_clk: clock at ea0240 {\n" + "> +\t\tsdio1xin_clk: clock@ea0240 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00240 0x4>;\n" @@ -147,7 +159,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgfx3dextra_clk: clock at ea0244 {\n" + "> +\t\tgfx3dextra_clk: clock@ea0244 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00244 0x4>;\n" @@ -158,7 +170,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgc360_clk: clock at ea024c {\n" + "> +\t\tgc360_clk: clock@ea024c {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea0024c 0x4>;\n" @@ -169,7 +181,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsdio_dllmst_clk: clock at ea0250 {\n" + "> +\t\tsdio_dllmst_clk: clock@ea0250 {\n" "> +\t\t\tcompatible = \"marvell,berlin2-clk-div\";\n" "> +\t\t\t#clock-cells = <0>;\n" "> +\t\t\treg = <0xea00250 0x4>;\n" @@ -180,7 +192,7 @@ "> +\t\t\t\t\"mux0\", \"mux1\", \"mux2\", \"mux3\";\n" "> +\t\t};\n" "> +\n" - "> \t\tapb at fc0000 {\n" + "> \t\tapb@fc0000 {\n" "> \t\t\tcompatible = \"simple-bus\";\n" "> \t\t\t#address-cells = <1>;\n" "> @@ -183,7 +325,7 @@\n" @@ -252,4 +264,4 @@ "> +#define CLKID_VIDEO2\t\t30\n" > -b7726f5eedae105ca9c03db1412eeff407ef7e571666e3213357a62b41659c5f +b14e23db7dd01d6543d7f4bade197de83a3c5031efa17570d15b2e022cc0bb4f
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