All of lore.kernel.org
 help / color / mirror / Atom feed
From: Josh Wu <josh.wu@atmel.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 2/2] ARMv7: at91: enable ICache and DCache.
Date: Fri, 16 May 2014 17:17:54 +0800	[thread overview]
Message-ID: <5375D7C2.9040002@atmel.com> (raw)
In-Reply-To: <5375CC82.3010705@atmel.com>

Hi, Bo

Thanks for the review  ;-)

On 5/16/2014 4:29 PM, Bo Shen wrote:
> Hi Josh,
>
> On 05/16/2014 04:15 PM, Josh Wu wrote:
>> As SAMA5D3 is a at91 ARMv7 cpu, so we should enable LCD DCache
>> flush for SAMA5D3X-EK.
>>
>> Signed-off-by: Josh Wu <josh.wu@atmel.com>
>> ---
>>   arch/arm/cpu/armv7/at91/cpu.c       |    6 ++++++
>>   board/atmel/sama5d3xek/sama5d3xek.c |    6 +++++-
>>   2 files changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/cpu/armv7/at91/cpu.c 
>> b/arch/arm/cpu/armv7/at91/cpu.c
>> index 2fbf60d..6f2164f 100644
>> --- a/arch/arm/cpu/armv7/at91/cpu.c
>> +++ b/arch/arm/cpu/armv7/at91/cpu.c
>> @@ -61,6 +61,12 @@ int print_cpuinfo(void)
>>
>>   void enable_caches(void)
>>   {
>> +#ifndef CONFIG_SYS_ICACHE_OFF
>> +    icache_enable();
>> +#endif
>
> No need this one. Ifdef CONFIG_SYS_ICACHE_OFF, it will be disabled.

ok, good. I will remove this #if.

>
>> +#ifndef CONFIG_SYS_DCACHE_OFF
>> +    dcache_enable();
>> +#endif

This will be removed too.

>>   }
>>
>>   unsigned int get_chip_id(void)
>> diff --git a/board/atmel/sama5d3xek/sama5d3xek.c 
>> b/board/atmel/sama5d3xek/sama5d3xek.c
>> index c835c12..1fc91d9 100644
>> --- a/board/atmel/sama5d3xek/sama5d3xek.c
>> +++ b/board/atmel/sama5d3xek/sama5d3xek.c
>> @@ -200,8 +200,12 @@ int board_init(void)
>>           at91_gmac_hw_init();
>>   #endif
>>   #ifdef CONFIG_LCD
>> -    if (has_lcdc())
>> +    if (has_lcdc()) {
>>           sama5d3xek_lcd_hw_init();
>> +
>> +        /* Enable flushing as we enabled dcache */
>> +        lcd_set_flush_dcache(1);
>
> Why not implement in driver, or else, each SoC enable dcache will need 
> add this.

hmm, the thing is some at91 board, for example at91sam9x5ek board, not 
defined CONFIG_SYS_DCACHE_OFF, that means DCache is enabled. But 
actually it doesn't implement dcache_enable().
In above situation, if we implement it in driver, I can't tell whether 
dcache is really enabled or not.
For this reason, I manually call lcd_set_flush_dcache(1) in the board file.
In the future if all boards (use hlcd driver) enabled dcache I will move 
this function to hlcd driver.

Best Regards,
Josh Wu

>
>> +    }
>>   #endif
>>       return 0;
>>   }
>>
>
> Best Regards,
> Bo Shen
>

  reply	other threads:[~2014-05-16  9:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-16  8:15 [U-Boot] [PATCH 0/2] ARMv7: at91: Enable ICache and DCache for at91 armv7 cpu Josh Wu
2014-05-16  8:15 ` [U-Boot] [PATCH 1/2] net: macb: enable dcache in macb Josh Wu
2014-05-16  8:15 ` [U-Boot] [PATCH 2/2] ARMv7: at91: enable ICache and DCache Josh Wu
2014-05-16  8:29   ` Bo Shen
2014-05-16  9:17     ` Josh Wu [this message]
2014-05-16  9:56       ` Bo Shen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=5375D7C2.9040002@atmel.com \
    --to=josh.wu@atmel.com \
    --cc=u-boot@lists.denx.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.