Re: [PATCH 2/2] x86: extend insn decoder to understand xop and evex prefixes

[Denys Vlasenko <dvlasenk@redhat.com>]

On 05/17/2014 06:00 PM, Masami Hiramatsu wrote:
> (2014/05/17 3:34), Denys Vlasenko wrote:
>> Since xop and evex prefixes are extensions of vex mechanism,
>> they have similar bit layouts, and they can never be combined
>> (an instruction can have only one of them),
>> (ab)use insn->vex_prefix to store data of xop and evex too.
>>
>> Users will need to conditionalize on insn->vex_prefix.bytes[0]
>> instead of insn->vex_prefix.nbytes if they want to determine
>> which of vex(-like) prefixes are there.
>>
>> Instead of adding more inattr bits for these prefixes, drop
>> VEX inattr bits and use VEX opcode values directly to detect them.
>> There is no point in having additional level of indirection here.
>> (And we are close to running out of inattr bits for prefixes).
> 
> Thank you very much for trying this work :)
> But sorry, Nak, I don't like to use the prefix byte directly.
> I'd rather like to add additional inattr bits for them.

Ok, I'm looking at inat.h and looks like I need to widen
INAT_PFX_BITS, otherwise I have no space for two more bits
for two more prefixes (XOP and EVEX):

/* AVX VEX prefixes */
#define INAT_PFX_VEX2   13      /* 2-bytes VEX prefix */
#define INAT_PFX_VEX3   14      /* 3-bytes VEX prefix */
...

/* Legacy prefix */
#define INAT_PFX_OFFS   0
#define INAT_PFX_BITS   4
#define INAT_PFX_MAX    ((1 << INAT_PFX_BITS) - 1)
#define INAT_PFX_MASK   (INAT_PFX_MAX << INAT_PFX_OFFS)