From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55263) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WnKAT-0004Ju-8O for qemu-devel@nongnu.org; Wed, 21 May 2014 23:59:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1WnKAD-00050f-9M for qemu-devel@nongnu.org; Wed, 21 May 2014 23:59:45 -0400 Received: from mail-pb0-f41.google.com ([209.85.160.41]:51827) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1WnKAD-00050T-2z for qemu-devel@nongnu.org; Wed, 21 May 2014 23:59:29 -0400 Received: by mail-pb0-f41.google.com with SMTP id uo5so2087653pbc.28 for ; Wed, 21 May 2014 20:59:27 -0700 (PDT) Message-ID: <537D7618.9070406@ozlabs.ru> Date: Thu, 22 May 2014 13:59:20 +1000 From: Alexey Kardashevskiy MIME-Version: 1.0 References: <1400653228-31540-1-git-send-email-aik@ozlabs.ru> <1400653228-31540-3-git-send-email-aik@ozlabs.ru> <537C83A9.6010603@suse.de> <537C9C77.1010402@ozlabs.ru> <537CA8EF.10208@suse.de> In-Reply-To: <537CA8EF.10208@suse.de> Content-Type: text/plain; charset=KOI8-R Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/9] target-ppc: Refactor init_proc_POWER7 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf , qemu-devel@nongnu.org Cc: Tom Musta , qemu-ppc@nongnu.org On 05/21/2014 11:23 PM, Alexander Graf wrote: > > On 21.05.14 14:30, Alexey Kardashevskiy wrote: >> On 05/21/2014 08:44 PM, Alexander Graf wrote: >>> On 21.05.14 08:20, Alexey Kardashevskiy wrote: >>>> This moves SPR initialization to helper functions. >>>> >>>> Signed-off-by: Alexey Kardashevskiy >>> I like the idea, but please refactor all book3s CPUs, not just POWER7. >>> >>> I also think we can cover a lot of the SPR registration by matching on >>> feature fields. VR for example is coupled to Altivec. >> >> Ok. >> >>> Maybe we could also introduce an enum for the exact cpu type, similar to >>> how we do it on e500? Then we could do fun things like >>> >>> if (cpu_type >= CPU_TYPE_970) { >>> gen_spr_book3s_vr(env); >>> } >>> >>> if (cpu_type >= CPU_TYPE_POWER7) { >>> gen_spr_lpar(env); >>> } >>> >>> switch (cpu_type) { >>> case CPU_TYPE_POWER7: >>> env->slb_nr = 32; >>> break; >>> default: >>> env->slb_nr = 64; >>> break; >>> } >>> >>> and thus combine all those book3s init functions into a single, more >>> maintainable version. >> If I can, I would like not to do it in this way, I'd rather have explicit >> list of gen_spr_FACILITY() calls always. For example, >> DABR/DABRX/whateverPOWER8has - it is not going to be always ">", and this >> breaks my weak mind :( > > Could you give me some examples where a newer POWER has lost features over > an older POWER? DABR/DABRX, also Paul mentioned "one exception is the instructions in power6 that are register moves between gpr and fpr registers". I do not know anything else though. So your point is taken, I'll try to do what you want :) -- Alexey