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diff for duplicates of <53842C7D.6050106@ti.com>

diff --git a/a/content_digest b/N1/content_digest
index c32a921..43bb38c 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -22,7 +22,7 @@
   Krishnamoorthy
   Balaji T <balajitk@ti.com>
   linux-doc@vger.kernel.org <linux-doc@vger.kernel.org>
-  linux-pci@vger.kernel.org
+  <linux-pci@vger.kernel.org>
   Rajendra Nayak <rnayak@ti.com>
   lkml <linux-kernel@vger.kernel.org>
   linux-omap <linux-omap@vger.kernel.org>
@@ -141,4 +141,4 @@
  "Thanks\n"
  Kishon
 
-70b0b1ec87b62fb6c615ff43569063b1caa62c49962493a928c41319158888e9
+7c99a3d438fa22d2c4431ec811b987a54e7896ba97681874a9c506f4e702a926

diff --git a/a/1.txt b/N2/1.txt
index e8f5424..0b27e8d 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -82,7 +82,7 @@ On Thursday 15 May 2014 06:03 PM, Nishanth Menon wrote:
 >>
 >> The apll clock node is like this
 >>
->> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux@4ae06118 {
+>> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux at 4ae06118 {
 >>         compatible = "mux-clock";
 >>         clocks = <&dpll_pcie_ref_m2ldo_ck>, <&pciesref_acs_clk_ck>;
 >>         #clock-cells = <0>;
diff --git a/a/content_digest b/N2/content_digest
index c32a921..d7f4748 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -10,23 +10,10 @@
  "ref\0CAGo_u6r8XtGHOvsfJKQMZ2ghFRz8x8_UhzyKE9jnwO6mJ2HYpQ@mail.gmail.com\0"
  "ref\05374B09F.2080803@ti.com\0"
  "ref\05374B409.3000607@ti.com\0"
- "From\0Kishon Vijay Abraham I <kishon@ti.com>\0"
- "Subject\0Re: [PATCH 03/17] phy: ti-pipe3: add external clock support for PCIe PHY\0"
+ "From\0kishon@ti.com (Kishon Vijay Abraham I)\0"
+ "Subject\0[PATCH 03/17] phy: ti-pipe3: add external clock support for PCIe PHY\0"
  "Date\0Tue, 27 May 2014 11:41:09 +0530\0"
- "To\0Nishanth Menon <nm@ti.com>"
-  Mike Turquette <mturquette@linaro.org>
-  Tero Kristo <t-kristo@ti.com>
- " Roger Quadros <rogerq@ti.com>\0"
- "Cc\0dt list <devicetree@vger.kernel.org>"
-  Paul Walmsley <paul@pwsan.com>
-  Krishnamoorthy
-  Balaji T <balajitk@ti.com>
-  linux-doc@vger.kernel.org <linux-doc@vger.kernel.org>
-  linux-pci@vger.kernel.org
-  Rajendra Nayak <rnayak@ti.com>
-  lkml <linux-kernel@vger.kernel.org>
-  linux-omap <linux-omap@vger.kernel.org>
- " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Hi,\n"
@@ -113,7 +100,7 @@
  ">>\n"
  ">> The apll clock node is like this\n"
  ">>\n"
- ">> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux@4ae06118 {\n"
+ ">> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux at 4ae06118 {\n"
  ">>         compatible = \"mux-clock\";\n"
  ">>         clocks = <&dpll_pcie_ref_m2ldo_ck>, <&pciesref_acs_clk_ck>;\n"
  ">>         #clock-cells = <0>;\n"
@@ -141,4 +128,4 @@
  "Thanks\n"
  Kishon
 
-70b0b1ec87b62fb6c615ff43569063b1caa62c49962493a928c41319158888e9
+99e0b2e4415f84b165bd708fdd71808d5f312b2b4ec77dee2293086a8ad761cb

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