From: marc.ceeeee@gmail.com (Marc Carino)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: zImage: add DSB and ISB barriers after relocating code
Date: Tue, 27 May 2014 10:15:25 -0700 [thread overview]
Message-ID: <5384C82D.1050506@gmail.com> (raw)
In-Reply-To: <alpine.LFD.2.11.1405222305310.17310@knanqh.ubzr>
Hello Nicolas,
> I assume that invalidating the i-cache would be a good thing to do in
> all cases.
Great! It looks like I'll be able to augment the existing cache function
lookup table with an additional I-cache invalidate operation.
> I'm curious though: at what address do you load your zImage, and what
> address does RAM start?
On our platform, we load the kernel zImage at address PA:0x8000. The
start of physical memory is at PA:0x0.
Thank you,
Marc
next prev parent reply other threads:[~2014-05-27 17:15 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-23 1:27 [PATCH] ARM: zImage: add DSB and ISB barriers after relocating code Marc Carino
2014-05-23 2:11 ` Nicolas Pitre
2014-05-23 2:56 ` Marc Carino
2014-05-23 3:15 ` Nicolas Pitre
2014-05-27 17:15 ` Marc Carino [this message]
2014-06-02 9:53 ` Dave Martin
2014-07-18 17:32 ` Marc C
2014-07-18 18:08 ` Nicolas Pitre
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