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From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: linux-sh@vger.kernel.org
Subject: Re: [PATCH 4/8] ARM: shmobile: lager: Add dummy PCIe bus clock
Date: Wed, 28 May 2014 17:40:14 +0000	[thread overview]
Message-ID: <53861F7E.9050401@cogentembedded.com> (raw)
In-Reply-To: <1401261843-6964-5-git-send-email-phil.edworthy@renesas.com>

On 05/28/2014 07:04 PM, Phil Edworthy wrote:

>>> Since the CPU's dtsi refers to pcie_bus_clock, we need an entry in
>>> the board's dts, even if we aren't using PCIe.

>>> Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
>>> ---
>>>    arch/arm/boot/dts/r8a7790-lager.dts | 10 ++++++++++
>>>    1 file changed, 10 insertions(+)

>>> diff --git a/arch/arm/boot/dts/r8a7790-lager.dts
>> b/arch/arm/boot/dts/r8a7790-lager.dts
>>> index 9becef7..6d4fe97 100644
>>> --- a/arch/arm/boot/dts/r8a7790-lager.dts
>>> +++ b/arch/arm/boot/dts/r8a7790-lager.dts
>>> @@ -144,6 +144,16 @@
>>>    		states = <3300000 1
>>>    			  1800000 0>;
>>>    	};
>>> +
>>> +	clocks {
>>> +		/* External PCIe bus clock - not used */
>>> +		pcie_bus_clk: pcie_bus_clk {
>>> +			compatible = "fixed-clock";
>>> +			#clock-cells = <0>;
>>> +			clock-frequency = <0>;

>>      When this value gets filled in?

> It doesn't. On the Lager board, there is no PCIe support.

> It's needed as pcie_bus_clk is referenced from r8a7790.dtsi and without it
> you'll get build failures.

    Yeah, I've figured that out after sending that email. Perhaps it makes 
sense to stub this clock in the SoC's .dtsi file alike the EXTAL clock?

> Cheers
> Phil

WBR, Sergei


  parent reply	other threads:[~2014-05-28 17:40 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-28  7:23 [PATCH 4/8] ARM: shmobile: lager: Add dummy PCIe bus clock Phil Edworthy
2014-05-28 12:44 ` Sergei Shtylyov
2014-05-28 15:04 ` Phil Edworthy
2014-05-28 17:40 ` Sergei Shtylyov [this message]
2014-05-29 14:46 ` Phil Edworthy
2014-06-10  8:06 ` Phil Edworthy

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