From: "Zhu, Lejun" <lejun.zhu@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>,
Alexandre Courbot <gnurou@gmail.com>,
Mathias Nyman <mathias.nyman@linux.intel.com>,
"linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
jacob.jun.pan@linux.intel.com, bin.yang@intel.com
Subject: Re: [PATCH v4] gpio: Add support for Intel SoC PMIC (Crystal Cove)
Date: Fri, 30 May 2014 10:12:37 +0800 [thread overview]
Message-ID: <5387E915.4000008@linux.intel.com> (raw)
In-Reply-To: <CACRpkdbe1=Yt3UDm9f4ZmZ+K2ZB9nVL+RNr7eU_TbnK-CmNY+A@mail.gmail.com>
On 5/29/2014 9:37 PM, Linus Walleij wrote:
> On Tue, May 27, 2014 at 2:04 PM, Grygorii Strashko
> <grygorii.strashko@ti.com> wrote:
>> On 05/27/2014 11:46 AM, Mika Westerberg wrote:
(...)
>
> My idea is that you should call gpiochip_add() *first* and then
> add the IRQs to the chip. In succession.
>
> Rationale: with dynamic GPIO numbers, gpio_to_irq()
> cannot reasonably be working before the gpiochip is added,
> so it should be added first, then the irqchip. Since irq_to_gpio()
> is *NOT* to be used (rather obliterated), this is the sequence
> we mandate.
>
> This is how the new irqchip helpers work by the way. As I
> introduce this to more and more drivers it will look more and
> more like this. And attack patches tagged RFT switching the
> semantics of drivers are appreciated.
>
> Yours,
> Linus Walleij
>
Thanks. I'll use this sequence during probe().
(...)
cg->regmap = pmic->regmap;
retval = gpiochip_add(&cg->chip);
if (retval) {
dev_warn(&pdev->dev, "add gpio chip error: %d\n", retval);
return ret;
}
gpiochip_irqchip_add(&cg->chip, &crystalcove_irqchip, 0,
handle_simple_irq, IRQ_TYPE_NONE);
retval = request_threaded_irq(irq, NULL, crystalcove_gpio_irq_handler,
IRQF_ONESHOT, KBUILD_MODNAME, cg);
if (retval) {
dev_warn(&pdev->dev, "request irq failed: %d\n", retval);
WARN_ON(gpiochip_remove(&cg->chip));
return retval;
}
return 0;
}
Is the code above OK?
But this code will trigger a crash in gpiolib-acpi. Currently at the end
of gpiochip_add(), it calls:
gpiochip_add() -> acpi_gpiochip_add() -> acpi_gpiochip_request_interrupts()
acpi_gpiochip_request_interrupts() needs ->to_irq to work. Without having
called gpiochip_irqchip_add() already, this will be NULL:
if (!chip->to_irq)
return; <-- It will return here.
INIT_LIST_HEAD(&acpi_gpio->events);
In the tear down path, acpi_gpiochip_free_interrupts() will find to_irq is
no longer NULL, then it will walk an uninitialized list.
So, should this be fixed in gpiolib-acpi?
Best Regards
Lejun
next prev parent reply other threads:[~2014-05-30 2:12 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-23 2:00 [PATCH v4] gpio: Add support for Intel SoC PMIC (Crystal Cove) Zhu, Lejun
2014-05-27 5:38 ` Alexandre Courbot
2014-05-27 6:15 ` Alexandre Courbot
2014-05-27 6:22 ` Zhu, Lejun
2014-05-27 9:24 ` Grygorii Strashko
2014-05-27 9:24 ` Grygorii Strashko
2014-05-27 8:46 ` Mika Westerberg
2014-05-27 12:04 ` Grygorii Strashko
2014-05-27 12:04 ` Grygorii Strashko
2014-05-27 15:14 ` Mika Westerberg
2014-05-29 13:37 ` Linus Walleij
2014-05-29 15:00 ` Mika Westerberg
2014-05-29 16:03 ` Grygorii Strashko
2014-05-29 16:03 ` Grygorii Strashko
2014-05-29 15:22 ` Linus Walleij
2014-05-30 8:25 ` Mika Westerberg
2014-06-03 8:10 ` Linus Walleij
2014-06-03 10:57 ` Mika Westerberg
2014-05-30 2:12 ` Zhu, Lejun [this message]
2014-06-03 8:08 ` Linus Walleij
2014-05-27 8:56 ` Zhu, Lejun
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