From: Leon Alrae <leon.alrae@imgtec.com>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: yongbok.kim@imgtec.com, cristian.cuna@imgtec.com, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 11/21] target-mips: Status.UX/SX/KX enable 32-bit address wrapping
Date: Mon, 2 Jun 2014 09:52:47 +0100 [thread overview]
Message-ID: <538C3B5F.5020408@imgtec.com> (raw)
In-Reply-To: <20140530224101.GA12523@ohm.rr44.fr>
On 30/05/14 23:41, Aurelien Jarno wrote:
>> In R6 the special behaviour for data references is also specified for Kernel
>> and Supervisor mode. Therefore MIPS_HFLAG_UX is replaced by generic MIPS_HFLAG_X
>> indicating whether 64-bit mode is enabled in current operating mode.
>
> I haven't found any indication of that in the MIPS64R6 manual (MD00091
> version 6.00). Section 4.10 still only mentions the user mode.
>
> Did I miss something?
You can find it in the Volume-II document (MD00087): Section "2.2.2.4.3
memory_address". It seems that some parts of MD00091 document haven't
been fully updated yet.
>> +#if defined(TARGET_MIPS64)
>> +static inline int is_wrapping_needed(DisasContext *ctx)
>> +{
>> + if (!(ctx->hflags & MIPS_HFLAG_X)) {
>> + /* If not R6 then wrap only in User Mode */
>> + if ((ctx->insn_flags & ISA_MIPS64R6) ||
>> + ((ctx->hflags & MIPS_HFLAG_KSU) == MIPS_HFLAG_UM)) {
>> + return 1;
>> + }
>> + }
>> + return 0;
>> +}
>> +#endif
>
> As Richard said, this code should be moved above, and the HFLAG semantic
> should be changed to "address wrapping needed". The current code is
> already wrong (and I am afraid I am the author...).
>
> So this could be done by renaming the HFLAG to for exemple
> MIPS_HFLAG_AWRAP, and checking only for this flag in gen_op_addr_add.
> Then the checks have to be adapted in compute_hflags, including the R6
> case.
I'll correct this. Thanks for the suggestion.
Leon
next parent reply other threads:[~2014-06-02 8:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1401461279-59617-1-git-send-email-leon.alrae@imgtec.com>
[not found] ` <1401461279-59617-12-git-send-email-leon.alrae@imgtec.com>
[not found] ` <20140530224101.GA12523@ohm.rr44.fr>
2014-06-02 8:52 ` Leon Alrae [this message]
[not found] ` <1401461279-59617-2-git-send-email-leon.alrae@imgtec.com>
[not found] ` <20140530164346.GA2766@ohm.rr44.fr>
2014-06-02 9:49 ` [Qemu-devel] [PATCH 01/21] target-mips: introduce MIPS64R6 ISA and a new generic CPU Leon Alrae
[not found] ` <1401461279-59617-3-git-send-email-leon.alrae@imgtec.com>
[not found] ` <20140530164348.GA4065@ohm.rr44.fr>
2014-06-02 10:03 ` [Qemu-devel] [PATCH 02/21] target-mips: signal RI Exception on instructions removed in R6 Maciej W. Rozycki
[not found] ` <1401461279-59617-14-git-send-email-leon.alrae@imgtec.com>
2014-06-02 19:16 ` [Qemu-devel] [PATCH 13/21] target-mips: add Compact Branches Aurelien Jarno
2014-06-03 9:29 ` Leon Alrae
2014-06-03 19:49 ` Aurelien Jarno
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