From mboxrd@z Thu Jan 1 00:00:00 1970 Return-path: Received: from szxga03-in.huawei.com ([119.145.14.66]) by bombadil.infradead.org with esmtps (Exim 4.80.1 #2 (Red Hat Linux)) id 1WrdWT-0001GF-Bj for kexec@lists.infradead.org; Tue, 03 Jun 2014 01:28:20 +0000 Message-ID: <538D245C.5090101@huawei.com> Date: Tue, 3 Jun 2014 09:26:52 +0800 From: Liu hua MIME-Version: 1.0 Subject: Re: [RESEND PATCH] kexec : add sparse memory related values to vmcore References: <1401284996-44873-1-git-send-email-sdu.liu@huawei.com> <20140529001328.GD22705@verge.net.au> In-Reply-To: <20140529001328.GD22705@verge.net.au> List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "kexec" Errors-To: kexec-bounces+dwmw2=infradead.org@lists.infradead.org To: Simon Horman Cc: wangnan0@huawei.com, peifeiyue@huawei.com, liusdu@126.com, kexec@lists.infradead.org, linux-kernel@vger.kernel.org, hui.geng@huawei.com, kumagai-atsushi@mxc.nes.nec.co.jp, ebiederm@xmission.com, anderson@redhat.com T24gMjAxNC81LzI5IDg6MTMsIFNpbW9uIEhvcm1hbiDlhpnpgZM6Cj4gT24gV2VkLCBNYXkgMjgs IDIwMTQgYXQgMDk6NDk6NTZQTSArMDgwMCwgTGl1IEh1YSB3cm90ZToKPj4gVGhpcyBwYXRjaCBk ZWFsZXMgd2l0aCBzcGFyc2UgbWVtb3J5IG1vZGVsLgo+Pgo+PiBGb3IgQVJNMzIgcGxhdGZvcm1z LCBkaWZmZXJlbnQgdmVuZG9ycyBtYXkgZGVmaW5lIGRpZmZlcmVudAo+PiBTRUNUSU9OX1NJWkVf QklUUywgd2hpY2ggd2UgZGlkIG5vdCB3cml0ZSB0byB2bWNvcmUuCj4+Cj4+IEZvciBleGFtcGxl Ogo+Pgo+PiAgIDEgYXJjaC9hcm0vbWFjaC1jbHBzNzExeC9pbmNsdWRlL21hY2gvbWVtb3J5LmgK Pj4gICAgICNkZWZpbmUgU0VDVElPTl9TSVpFX0JJVFMgMjQKPj4gICAyIGFyY2gvYXJtL21hY2gt ZXh5bm9zL2luY2x1ZGUvbWFjaC9tZW1vcnkuaAo+PiAgICAgI2RlZmluZSBTRUNUSU9OX1NJWkVf QklUUyAyOAo+PiAgIDMgYXJjaC9hcm0vbWFjaC1zYTExMDAvaW5jbHVkZS9tYWNoL21lbW9yeS5o Cj4+ICAgICAjZGVmaW5lIFNFQ1RJT05fU0laRV9CSVRTIDI3Cj4gCj4gSSB3b25kZXIgaWYgdGhp cyBwcm9ibGVtIHdpbGwgZXZlbnR1YWxseSBnbyBhd2F5LCBvciBhdCBsZWFzdCBvbmx5Cj4gYXBw bHkgdG8gb2xkZXIgcGxhdGZvcm1zLCBhcyBBUk0gbW92ZXMgdG93YXJkcyBtdWx0aXBsYXRmb3Jt OiBhIHNpbmdsZQo+IGtlcm5lbCBmb3IgbW9yZSB0aGFuIG9uZSBwbGF0Zm9ybS4KCgo+PiBJdCBp cyByZWFsbHkgYSBiYWQgbmV3cyBmb3IgdXNlciBzcGFjZSB0b29scyBzdWNoIGFzCj4+IG1ha2Vk dW1wZmlsZSBhbmQgY3Jhc2gsIHdobyBoYXZlIHRvIGRlZmluZXMgdGhlbSBhcwo+PiBtYWNyb3Mu IFNvIGZvciB0aGUgc2FtZSBhcmNoaXRlY3R1cmUsIHdlIG1heSBuZWVkIHRvCj4+IHJlY29taWxl IHRoZW0gdG8gcGFyc2Ugdm1jb3JlcyB3aXRoIGRpZmZlcmVudAo+PiBTRUNUSU9OX1NJWkVfQklU Uy4KPj4KPj4gQW5kIGlmIHdlIGVuYWJsZSBMUEFFLCBNQVhfUEhZU01FTV9TSVpFIGNhbiBhbHNl Cj4+IGJlIHZhcmlhYmxlLgo+Pgo+PiBUaGlzIHBhdGNoIGFkZHMgdGhlc2UgU0VDVElPTl9TSVpF X0JJVFMgYW5kIE1BWF9QSFlTTUVNX1NJWkUKPj4gdG8gdm1jb3JlLiB3aGljaCBtYWtlcyB1c2Vy IHNwYWNlIHRvb2xzIG1vcmUgY29tcGF0aWJsZS4KPj4KPj4gQlRXLCBtYWtlZHVtcGZpbGUgaGFz IHF1ZXVlZCB0aGUgcmVsYXRlZCBwYXRjaC4KPj4KPj4gU2lnbmVkLW9mZi1ieTogTGl1IEh1YSA8 c2R1LmxpdUBodWF3ZWkuY29tPgo+PiAtLS0KPj4gIGtlcm5lbC9rZXhlYy5jIHwgMiArKwo+PiAg MSBmaWxlIGNoYW5nZWQsIDIgaW5zZXJ0aW9ucygrKQo+Pgo+PiBkaWZmIC0tZ2l0IGEva2VybmVs L2tleGVjLmMgYi9rZXJuZWwva2V4ZWMuYwo+PiBpbmRleCBiZjBiOTI5ZS4uOGIxYTE5MyAxMDA2 NDQKPj4gLS0tIGEva2VybmVsL2tleGVjLmMKPj4gKysrIGIva2VybmVsL2tleGVjLmMKPj4gQEAg LTE1NzcsNiArMTU3Nyw4IEBAIHN0YXRpYyBpbnQgX19pbml0IGNyYXNoX3NhdmVfdm1jb3JlaW5m b19pbml0KHZvaWQpCj4+ICAJVk1DT1JFSU5GT19MRU5HVEgobWVtX3NlY3Rpb24sIE5SX1NFQ1RJ T05fUk9PVFMpOwo+PiAgCVZNQ09SRUlORk9fU1RSVUNUX1NJWkUobWVtX3NlY3Rpb24pOwo+PiAg CVZNQ09SRUlORk9fT0ZGU0VUKG1lbV9zZWN0aW9uLCBzZWN0aW9uX21lbV9tYXApOwo+PiArCVZN Q09SRUlORk9fTlVNQkVSKE1BWF9QSFlTTUVNX0JJVFMpOwo+PiArCVZNQ09SRUlORk9fTlVNQkVS KFNFQ1RJT05fU0laRV9CSVRTKTsKPj4gICNlbmRpZgo+PiAgCVZNQ09SRUlORk9fU1RSVUNUX1NJ WkUocGFnZSk7Cj4+ICAJVk1DT1JFSU5GT19TVFJVQ1RfU0laRShwZ2xpc3RfZGF0YSk7Cj4+IC0t IAo+PiAxLjkuMAo+Pgo+Pgo+PiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fXwo+PiBrZXhlYyBtYWlsaW5nIGxpc3QKPj4ga2V4ZWNAbGlzdHMuaW5mcmFkZWFk Lm9yZwo+PiBodHRwOi8vbGlzdHMuaW5mcmFkZWFkLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2tleGVj Cj4+Cj4gCj4gX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18K PiBrZXhlYyBtYWlsaW5nIGxpc3QKPiBrZXhlY0BsaXN0cy5pbmZyYWRlYWQub3JnCj4gaHR0cDov L2xpc3RzLmluZnJhZGVhZC5vcmcvbWFpbG1hbi9saXN0aW5mby9rZXhlYwo+IAo+IC4KPiAKCgoK X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18Ka2V4ZWMgbWFp bGluZyBsaXN0CmtleGVjQGxpc3RzLmluZnJhZGVhZC5vcmcKaHR0cDovL2xpc3RzLmluZnJhZGVh ZC5vcmcvbWFpbG1hbi9saXN0aW5mby9rZXhlYwo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751665AbaFCB1O (ORCPT ); Mon, 2 Jun 2014 21:27:14 -0400 Received: from szxga03-in.huawei.com ([119.145.14.66]:9543 "EHLO szxga03-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750767AbaFCB1N (ORCPT ); Mon, 2 Jun 2014 21:27:13 -0400 Message-ID: <538D245C.5090101@huawei.com> Date: Tue, 3 Jun 2014 09:26:52 +0800 From: Liu hua User-Agent: Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.0.1 MIME-Version: 1.0 To: Simon Horman CC: , , , , , , , , Subject: Re: [RESEND PATCH] kexec : add sparse memory related values to vmcore References: <1401284996-44873-1-git-send-email-sdu.liu@huawei.com> <20140529001328.GD22705@verge.net.au> In-Reply-To: <20140529001328.GD22705@verge.net.au> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-Originating-IP: [10.111.58.238] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 2014/5/29 8:13, Simon Horman 写道: > On Wed, May 28, 2014 at 09:49:56PM +0800, Liu Hua wrote: >> This patch deales with sparse memory model. >> >> For ARM32 platforms, different vendors may define different >> SECTION_SIZE_BITS, which we did not write to vmcore. >> >> For example: >> >> 1 arch/arm/mach-clps711x/include/mach/memory.h >> #define SECTION_SIZE_BITS 24 >> 2 arch/arm/mach-exynos/include/mach/memory.h >> #define SECTION_SIZE_BITS 28 >> 3 arch/arm/mach-sa1100/include/mach/memory.h >> #define SECTION_SIZE_BITS 27 > > I wonder if this problem will eventually go away, or at least only > apply to older platforms, as ARM moves towards multiplatform: a single > kernel for more than one platform. >> It is really a bad news for user space tools such as >> makedumpfile and crash, who have to defines them as >> macros. So for the same architecture, we may need to >> recomile them to parse vmcores with different >> SECTION_SIZE_BITS. >> >> And if we enable LPAE, MAX_PHYSMEM_SIZE can alse >> be variable. >> >> This patch adds these SECTION_SIZE_BITS and MAX_PHYSMEM_SIZE >> to vmcore. which makes user space tools more compatible. >> >> BTW, makedumpfile has queued the related patch. >> >> Signed-off-by: Liu Hua >> --- >> kernel/kexec.c | 2 ++ >> 1 file changed, 2 insertions(+) >> >> diff --git a/kernel/kexec.c b/kernel/kexec.c >> index bf0b929e..8b1a193 100644 >> --- a/kernel/kexec.c >> +++ b/kernel/kexec.c >> @@ -1577,6 +1577,8 @@ static int __init crash_save_vmcoreinfo_init(void) >> VMCOREINFO_LENGTH(mem_section, NR_SECTION_ROOTS); >> VMCOREINFO_STRUCT_SIZE(mem_section); >> VMCOREINFO_OFFSET(mem_section, section_mem_map); >> + VMCOREINFO_NUMBER(MAX_PHYSMEM_BITS); >> + VMCOREINFO_NUMBER(SECTION_SIZE_BITS); >> #endif >> VMCOREINFO_STRUCT_SIZE(page); >> VMCOREINFO_STRUCT_SIZE(pglist_data); >> -- >> 1.9.0 >> >> >> _______________________________________________ >> kexec mailing list >> kexec@lists.infradead.org >> http://lists.infradead.org/mailman/listinfo/kexec >> > > _______________________________________________ > kexec mailing list > kexec@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/kexec > > . >