diff for duplicates of <539B11EB.6010304@samsung.com> diff --git a/a/1.txt b/N1/1.txt index 14b3bf3..fd9c884 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -43,4 +43,25 @@ On 12.06.2014 15:38, Daniel Drake wrote: > > Thanks > Daniel -> +> +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: 0001-ARM-EXYNOS-Invalidate-L2-cache-with-SMC-command-befo.patch +Type: text/x-patch +Size: 818 bytes +Desc: not available +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140613/1b789d7b/attachment.bin> +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: 0002-ARM-mm-l2x0-Add-support-for-overriding-prefetch-sett.patch +Type: text/x-patch +Size: 3544 bytes +Desc: not available +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140613/1b789d7b/attachment-0001.bin> +-------------- next part -------------- +A non-text attachment was scrubbed... +Name: 0003-ARM-dts-exynos4x12-Override-prefetch-settings.patch +Type: text/x-patch +Size: 860 bytes +Desc: not available +URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140613/1b789d7b/attachment-0002.bin> diff --git a/a/2.hdr b/a/2.hdr deleted file mode 100644 index 8eab95d..0000000 --- a/a/2.hdr +++ /dev/null @@ -1,6 +0,0 @@ -Content-Type: text/x-patch; - name="0001-ARM-EXYNOS-Invalidate-L2-cache-with-SMC-command-befo.patch" -Content-Transfer-Encoding: 7bit -Content-Disposition: attachment; - filename*0="0001-ARM-EXYNOS-Invalidate-L2-cache-with-SMC-command-befo.pa"; - filename*1="tch" diff --git a/a/2.txt b/a/2.txt deleted file mode 100644 index 90e9761..0000000 --- a/a/2.txt +++ /dev/null @@ -1,26 +0,0 @@ ->From b574212db2c1c226212c74b475acceb7fa507c27 Mon Sep 17 00:00:00 2001 -From: Tomasz Figa <t.figa@samsung.com> -Date: Fri, 13 Jun 2014 16:40:29 +0200 -Subject: [PATCH 1/3] ARM: EXYNOS: Invalidate L2 cache with SMC command before - enabling - -Signed-off-by: Tomasz Figa <t.figa@samsung.com> ---- - arch/arm/mach-exynos/firmware.c | 2 ++ - 1 file changed, 2 insertions(+) - -diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c -index d8544537..a688757 100644 ---- a/arch/arm/mach-exynos/firmware.c -+++ b/arch/arm/mach-exynos/firmware.c -@@ -110,6 +110,8 @@ static void exynos_l2_write_sec(unsigned long val, void __iomem *base, - { - switch (reg) { - case L2X0_CTRL: -+ if (val & L2X0_CTRL_EN) -+ exynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0); - exynos_smc(SMC_CMD_L2X0CTRL, val, 0, 0); - break; - --- -1.9.3 diff --git a/a/3.hdr b/a/3.hdr deleted file mode 100644 index f792e3e..0000000 --- a/a/3.hdr +++ /dev/null @@ -1,6 +0,0 @@ -Content-Type: text/x-patch; - name="0002-ARM-mm-l2x0-Add-support-for-overriding-prefetch-sett.patch" -Content-Transfer-Encoding: 7bit -Content-Disposition: attachment; - filename*0="0002-ARM-mm-l2x0-Add-support-for-overriding-prefetch-sett.pa"; - filename*1="tch" diff --git a/a/3.txt b/a/3.txt deleted file mode 100644 index a7a706b..0000000 --- a/a/3.txt +++ /dev/null @@ -1,102 +0,0 @@ ->From 0803df887262849ab8ef905f15fdbe2b34598dde Mon Sep 17 00:00:00 2001 -From: Tomasz Figa <t.figa@samsung.com> -Date: Fri, 13 Jun 2014 16:48:47 +0200 -Subject: [PATCH 2/3] ARM: mm: l2x0: Add support for overriding prefetch - settings - -Signed-off-by: Tomasz Figa <t.figa@samsung.com> ---- - Documentation/devicetree/bindings/arm/l2cc.txt | 10 ++++++ - arch/arm/mm/cache-l2x0.c | 46 ++++++++++++++++++++++++++ - 2 files changed, 56 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt -index b513cb8..8096fcd 100644 ---- a/Documentation/devicetree/bindings/arm/l2cc.txt -+++ b/Documentation/devicetree/bindings/arm/l2cc.txt -@@ -44,6 +44,16 @@ Optional properties: - - cache-id-part: cache id part number to be used if it is not present - on hardware - - wt-override: If present then L2 is forced to Write through mode -+- arm,double-linefill : Override double linefill enable setting. Enable if -+ non-zero, disable if zero. -+- arm,double-linefill-incr : Override double linefill on INCR read. Enable -+ if non-zero, disable if zero. -+- arm,double-linefill-wrap : Override double linefill on WRAP read. Enable -+ if non-zero, disable if zero. -+- arm,prefetch-drop : Override prefetch drop enable setting. Enable if non-zero, -+ disable if zero. -+- arm,prefetch-offset : Override prefetch offset value. Valid values are -+ 0-7, 15, 23, and 31. - - Example: - -diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c -index c25cc13..de39865 100644 ---- a/arch/arm/mm/cache-l2x0.c -+++ b/arch/arm/mm/cache-l2x0.c -@@ -1018,9 +1018,12 @@ static const struct l2c_init_data of_l2c220_data __initconst = { - static void __init l2c310_of_parse(const struct device_node *np, - u32 *aux_val, u32 *aux_mask) - { -+ bool set_prefetch = false; - u32 data[3] = { 0, 0, 0 }; - u32 tag[3] = { 0, 0, 0 }; - u32 filter[2] = { 0, 0 }; -+ u32 prefetch; -+ u32 val; - - of_property_read_u32_array(np, "arm,tag-latency", tag, ARRAY_SIZE(tag)); - if (tag[0] && tag[1] && tag[2]) -@@ -1047,6 +1050,49 @@ static void __init l2c310_of_parse(const struct device_node *np, - writel_relaxed((filter[0] & ~(SZ_1M - 1)) | L310_ADDR_FILTER_EN, - l2x0_base + L310_ADDR_FILTER_START); - } -+ -+ prefetch = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL); -+ -+ if (!of_property_read_u32(np, "arm,double-linefill", &val)) { -+ if (val) -+ prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL; -+ else -+ prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL; -+ set_prefetch = true; -+ } -+ -+ if (!of_property_read_u32(np, "arm,double-linefill-incr", &val)) { -+ if (val) -+ prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; -+ else -+ prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_INCR; -+ set_prefetch = true; -+ } -+ -+ if (!of_property_read_u32(np, "arm,double-linefill-wrap", &val)) { -+ if (!val) -+ prefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP; -+ else -+ prefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP; -+ set_prefetch = true; -+ } -+ -+ if (!of_property_read_u32(np, "arm,prefetch-drop", &val)) { -+ if (val) -+ prefetch |= L310_PREFETCH_CTRL_PREFETCH_DROP; -+ else -+ prefetch &= ~L310_PREFETCH_CTRL_PREFETCH_DROP; -+ set_prefetch = true; -+ } -+ -+ if (!of_property_read_u32(np, "arm,prefetch-offset", &val)) { -+ prefetch &= ~L310_PREFETCH_CTRL_OFFSET_MASK; -+ prefetch |= val & L310_PREFETCH_CTRL_OFFSET_MASK; -+ set_prefetch = true; -+ } -+ -+ if (set_prefetch) -+ l2c_write_sec(prefetch, l2x0_base, L310_PREFETCH_CTRL); - } - - static const struct l2c_init_data of_l2c310_data __initconst = { --- -1.9.3 diff --git a/a/4.hdr b/a/4.hdr deleted file mode 100644 index 5e9f36f..0000000 --- a/a/4.hdr +++ /dev/null @@ -1,5 +0,0 @@ -Content-Type: text/x-patch; - name="0003-ARM-dts-exynos4x12-Override-prefetch-settings.patch" -Content-Transfer-Encoding: 7bit -Content-Disposition: attachment; - filename*0="0003-ARM-dts-exynos4x12-Override-prefetch-settings.patch" diff --git a/a/4.txt b/a/4.txt deleted file mode 100644 index 733e898..0000000 --- a/a/4.txt +++ /dev/null @@ -1,28 +0,0 @@ ->From 032125d7f099d9160ad98371313a829131ebed8c Mon Sep 17 00:00:00 2001 -From: Tomasz Figa <t.figa@samsung.com> -Date: Fri, 13 Jun 2014 16:49:09 +0200 -Subject: [PATCH 3/3] ARM: dts: exynos4x12: Override prefetch settings. - -Signed-off-by: Tomasz Figa <t.figa@samsung.com> ---- - arch/arm/boot/dts/exynos4x12.dtsi | 5 +++++ - 1 file changed, 5 insertions(+) - -diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi -index 9487f9c..ddffefe 100644 ---- a/arch/arm/boot/dts/exynos4x12.dtsi -+++ b/arch/arm/boot/dts/exynos4x12.dtsi -@@ -67,6 +67,11 @@ - cache-level = <2>; - arm,tag-latency = <2 2 1>; - arm,data-latency = <3 2 1>; -+ arm,double-linefill = <1>; -+ arm,double-linefill-incr = <0>; -+ arm,double-linefill-wrap = <1>; -+ arm,prefetch-drop = <1>; -+ arm,prefetch-offset = <7>; - }; - - clock: clock-controller@10030000 { --- -1.9.3 diff --git a/a/content_digest b/N1/content_digest index 8773550..90331a3 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,20 +1,9 @@ "ref\0CAD8Lp46MbKZrCAMp+9T9LbWTB4uHRDdivhtjoQbkTyBbK48EgQ@mail.gmail.com\0" - "From\0Tomasz Figa <t.figa@samsung.com>\0" - "Subject\0Re: [PATCH 0/5] Handle non-secure L2C initialization on Exynos4\0" + "From\0t.figa@samsung.com (Tomasz Figa)\0" + "Subject\0[PATCH 0/5] Handle non-secure L2C initialization on Exynos4\0" "Date\0Fri, 13 Jun 2014 16:59:55 +0200\0" - "To\0Daniel Drake <drake@endlessm.com>\0" - "Cc\0Kukjin Kim <kgene.kim@samsung.com>" - Laura Abbott <lauraa@codeaurora.org> - Tony Lindgren <tony@atomide.com> - Linus Walleij <linus.walleij@linaro.org> - linux-kernel@vger.kernel.org - Tomasz Figa <tomasz.figa@gmail.com> - Santosh Shilimkar <santosh.shilimkar@ti.com> - Robin Holt <holt@sgi.com> - Russell King <linux@arm.linux.org.uk> - linux-omap@vger.kernel.org - " linux-arm-kernel@lists.infradead.org\0" - "\01:1\0" + "To\0linux-arm-kernel@lists.infradead.org\0" + "\00:1\0" "b\0" "Hi Daniel,\n" "\n" @@ -61,171 +50,27 @@ "> \n" "> Thanks\n" "> Daniel\n" - > - "\01:2\0" - "fn\00001-ARM-EXYNOS-Invalidate-L2-cache-with-SMC-command-befo.patch\0" - "b\0" - ">From b574212db2c1c226212c74b475acceb7fa507c27 Mon Sep 17 00:00:00 2001\n" - "From: Tomasz Figa <t.figa@samsung.com>\n" - "Date: Fri, 13 Jun 2014 16:40:29 +0200\n" - "Subject: [PATCH 1/3] ARM: EXYNOS: Invalidate L2 cache with SMC command before\n" - " enabling\n" - "\n" - "Signed-off-by: Tomasz Figa <t.figa@samsung.com>\n" - "---\n" - " arch/arm/mach-exynos/firmware.c | 2 ++\n" - " 1 file changed, 2 insertions(+)\n" - "\n" - "diff --git a/arch/arm/mach-exynos/firmware.c b/arch/arm/mach-exynos/firmware.c\n" - "index d8544537..a688757 100644\n" - "--- a/arch/arm/mach-exynos/firmware.c\n" - "+++ b/arch/arm/mach-exynos/firmware.c\n" - "@@ -110,6 +110,8 @@ static void exynos_l2_write_sec(unsigned long val, void __iomem *base,\n" - " {\n" - " \tswitch (reg) {\n" - " \tcase L2X0_CTRL:\n" - "+\t\tif (val & L2X0_CTRL_EN)\n" - "+\t\t\texynos_smc(SMC_CMD_L2X0INVALL, 0, 0, 0);\n" - " \t\texynos_smc(SMC_CMD_L2X0CTRL, val, 0, 0);\n" - " \t\tbreak;\n" - " \n" - "-- \n" - 1.9.3 - "\01:3\0" - "fn\00002-ARM-mm-l2x0-Add-support-for-overriding-prefetch-sett.patch\0" - "b\0" - ">From 0803df887262849ab8ef905f15fdbe2b34598dde Mon Sep 17 00:00:00 2001\n" - "From: Tomasz Figa <t.figa@samsung.com>\n" - "Date: Fri, 13 Jun 2014 16:48:47 +0200\n" - "Subject: [PATCH 2/3] ARM: mm: l2x0: Add support for overriding prefetch\n" - " settings\n" - "\n" - "Signed-off-by: Tomasz Figa <t.figa@samsung.com>\n" - "---\n" - " Documentation/devicetree/bindings/arm/l2cc.txt | 10 ++++++\n" - " arch/arm/mm/cache-l2x0.c | 46 ++++++++++++++++++++++++++\n" - " 2 files changed, 56 insertions(+)\n" - "\n" - "diff --git a/Documentation/devicetree/bindings/arm/l2cc.txt b/Documentation/devicetree/bindings/arm/l2cc.txt\n" - "index b513cb8..8096fcd 100644\n" - "--- a/Documentation/devicetree/bindings/arm/l2cc.txt\n" - "+++ b/Documentation/devicetree/bindings/arm/l2cc.txt\n" - "@@ -44,6 +44,16 @@ Optional properties:\n" - " - cache-id-part: cache id part number to be used if it is not present\n" - " on hardware\n" - " - wt-override: If present then L2 is forced to Write through mode\n" - "+- arm,double-linefill : Override double linefill enable setting. Enable if\n" - "+ non-zero, disable if zero.\n" - "+- arm,double-linefill-incr : Override double linefill on INCR read. Enable\n" - "+ if non-zero, disable if zero.\n" - "+- arm,double-linefill-wrap : Override double linefill on WRAP read. Enable\n" - "+ if non-zero, disable if zero.\n" - "+- arm,prefetch-drop : Override prefetch drop enable setting. Enable if non-zero,\n" - "+ disable if zero.\n" - "+- arm,prefetch-offset : Override prefetch offset value. Valid values are\n" - "+ 0-7, 15, 23, and 31.\n" - " \n" - " Example:\n" - " \n" - "diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c\n" - "index c25cc13..de39865 100644\n" - "--- a/arch/arm/mm/cache-l2x0.c\n" - "+++ b/arch/arm/mm/cache-l2x0.c\n" - "@@ -1018,9 +1018,12 @@ static const struct l2c_init_data of_l2c220_data __initconst = {\n" - " static void __init l2c310_of_parse(const struct device_node *np,\n" - " \tu32 *aux_val, u32 *aux_mask)\n" - " {\n" - "+\tbool set_prefetch = false;\n" - " \tu32 data[3] = { 0, 0, 0 };\n" - " \tu32 tag[3] = { 0, 0, 0 };\n" - " \tu32 filter[2] = { 0, 0 };\n" - "+\tu32 prefetch;\n" - "+\tu32 val;\n" - " \n" - " \tof_property_read_u32_array(np, \"arm,tag-latency\", tag, ARRAY_SIZE(tag));\n" - " \tif (tag[0] && tag[1] && tag[2])\n" - "@@ -1047,6 +1050,49 @@ static void __init l2c310_of_parse(const struct device_node *np,\n" - " \t\twritel_relaxed((filter[0] & ~(SZ_1M - 1)) | L310_ADDR_FILTER_EN,\n" - " \t\t\t l2x0_base + L310_ADDR_FILTER_START);\n" - " \t}\n" - "+\n" - "+\tprefetch = readl_relaxed(l2x0_base + L310_PREFETCH_CTRL);\n" - "+\n" - "+\tif (!of_property_read_u32(np, \"arm,double-linefill\", &val)) {\n" - "+\t\tif (val)\n" - "+\t\t\tprefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL;\n" - "+\t\telse\n" - "+\t\t\tprefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL;\n" - "+\t\tset_prefetch = true;\n" - "+\t}\n" - "+\n" - "+\tif (!of_property_read_u32(np, \"arm,double-linefill-incr\", &val)) {\n" - "+\t\tif (val)\n" - "+\t\t\tprefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;\n" - "+\t\telse\n" - "+\t\t\tprefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_INCR;\n" - "+\t\tset_prefetch = true;\n" - "+\t}\n" - "+\n" - "+\tif (!of_property_read_u32(np, \"arm,double-linefill-wrap\", &val)) {\n" - "+\t\tif (!val)\n" - "+\t\t\tprefetch |= L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP;\n" - "+\t\telse\n" - "+\t\t\tprefetch &= ~L310_PREFETCH_CTRL_DBL_LINEFILL_WRAP;\n" - "+\t\tset_prefetch = true;\n" - "+\t}\n" - "+\n" - "+\tif (!of_property_read_u32(np, \"arm,prefetch-drop\", &val)) {\n" - "+\t\tif (val)\n" - "+\t\t\tprefetch |= L310_PREFETCH_CTRL_PREFETCH_DROP;\n" - "+\t\telse\n" - "+\t\t\tprefetch &= ~L310_PREFETCH_CTRL_PREFETCH_DROP;\n" - "+\t\tset_prefetch = true;\n" - "+\t}\n" - "+\n" - "+\tif (!of_property_read_u32(np, \"arm,prefetch-offset\", &val)) {\n" - "+\t\tprefetch &= ~L310_PREFETCH_CTRL_OFFSET_MASK;\n" - "+\t\tprefetch |= val & L310_PREFETCH_CTRL_OFFSET_MASK;\n" - "+\t\tset_prefetch = true;\n" - "+\t}\n" - "+\n" - "+\tif (set_prefetch)\n" - "+\t\tl2c_write_sec(prefetch, l2x0_base, L310_PREFETCH_CTRL);\n" - " }\n" - " \n" - " static const struct l2c_init_data of_l2c310_data __initconst = {\n" - "-- \n" - 1.9.3 - "\01:4\0" - "fn\00003-ARM-dts-exynos4x12-Override-prefetch-settings.patch\0" - "b\0" - ">From 032125d7f099d9160ad98371313a829131ebed8c Mon Sep 17 00:00:00 2001\n" - "From: Tomasz Figa <t.figa@samsung.com>\n" - "Date: Fri, 13 Jun 2014 16:49:09 +0200\n" - "Subject: [PATCH 3/3] ARM: dts: exynos4x12: Override prefetch settings.\n" - "\n" - "Signed-off-by: Tomasz Figa <t.figa@samsung.com>\n" - "---\n" - " arch/arm/boot/dts/exynos4x12.dtsi | 5 +++++\n" - " 1 file changed, 5 insertions(+)\n" - "\n" - "diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi\n" - "index 9487f9c..ddffefe 100644\n" - "--- a/arch/arm/boot/dts/exynos4x12.dtsi\n" - "+++ b/arch/arm/boot/dts/exynos4x12.dtsi\n" - "@@ -67,6 +67,11 @@\n" - " \t\tcache-level = <2>;\n" - " \t\tarm,tag-latency = <2 2 1>;\n" - " \t\tarm,data-latency = <3 2 1>;\n" - "+\t\tarm,double-linefill = <1>;\n" - "+\t\tarm,double-linefill-incr = <0>;\n" - "+\t\tarm,double-linefill-wrap = <1>;\n" - "+\t\tarm,prefetch-drop = <1>;\n" - "+\t\tarm,prefetch-offset = <7>;\n" - " \t};\n" - " \n" - " \tclock: clock-controller@10030000 {\n" - "-- \n" - 1.9.3 + "> \n" + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: 0001-ARM-EXYNOS-Invalidate-L2-cache-with-SMC-command-befo.patch\n" + "Type: text/x-patch\n" + "Size: 818 bytes\n" + "Desc: not available\n" + "URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140613/1b789d7b/attachment.bin>\n" + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: 0002-ARM-mm-l2x0-Add-support-for-overriding-prefetch-sett.patch\n" + "Type: text/x-patch\n" + "Size: 3544 bytes\n" + "Desc: not available\n" + "URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140613/1b789d7b/attachment-0001.bin>\n" + "-------------- next part --------------\n" + "A non-text attachment was scrubbed...\n" + "Name: 0003-ARM-dts-exynos4x12-Override-prefetch-settings.patch\n" + "Type: text/x-patch\n" + "Size: 860 bytes\n" + "Desc: not available\n" + URL: <http://lists.infradead.org/pipermail/linux-arm-kernel/attachments/20140613/1b789d7b/attachment-0002.bin> -e7fc295978fcab3f2cfb7c5ec86350d39471f3d818603fe9c27dbd13700dff2a +fdae1225589d3b5fdf3f7ffbe2ded666225e32516fa9c43385a462b5aa09044e
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