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Date: Wed, 18 Jun 2014 10:57:54 +0200
From: Christian Zigotzky <chzigotzky@xenosoft.de>
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To: Michael Ellerman <mpe@ellerman.id.au>, linuxppc-dev@lists.ozlabs.org,
 Olof Johansson <olof@lixom.net>
Subject: Kernel 3.15: Boot problems with a PA6T board
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Am 18.06.14 08:51, schrieb Michael Ellerman:
> On Tue, 2014-06-10 at 15:20 +0200, Christian Zigotzky wrote:
>> Hi All,
>>
>> Could you help me to remove the changes of the PCI code, please? Or
>> which patches shall I remove to get the old PCI code?
> Hi Christian,
>
> Thanks for doing the bisect. It wasn't clear why that change was causing your
> issue, so I guess we're a bit stuck.
>
> Olof (on CC), was going to try and look at it when he got some spare time.
> Please keep him on CC.
>
> cheers
>
>
>
Hi Michael,

Thank you for your answer. Adrian told me the reason about this issue.

Quote Adrian:

As I recall, PCI resource allocation on Nemo was always a little strange 
due to using an AMD south bridge together with the PA6T north bridge. 
The south bridge does not behave as a standard PCIe device, but instead 
presents itself as multiple devices on the PCIe root bus. This is not 
compliant with the PCIe specification. We modified the core powerpc PCI 
code so that Nemo could boot, but the changes to PCI code in 3.15 have 
broken the old workaround. I don't understand the PCI changes in 3.15 
enough to comment further at this point.

Regards,
Adrian

Quote end

Cheers,

Christian