diff for duplicates of <53A2E491.5040406@ti.com> diff --git a/a/content_digest b/N1/content_digest index 777aedf..088701e 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -6,15 +6,15 @@ "Subject\0Re: [PATCH v2 07/18] ARM: dts: DRA7: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck\0" "Date\0Thu, 19 Jun 2014 16:24:33 +0300\0" "To\0Kishon Vijay Abraham I <kishon@ti.com>" - devicetree@vger.kernel.org - linux-doc@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-omap@vger.kernel.org - linux-pci@vger.kernel.org - " linux-kernel@vger.kernel.org\0" - "Cc\0arnd@arndb.de" - tony@atomide.com - jg1.han@samsung.com + <devicetree@vger.kernel.org> + <linux-doc@vger.kernel.org> + <linux-arm-kernel@lists.infradead.org> + <linux-omap@vger.kernel.org> + <linux-pci@vger.kernel.org> + " <linux-kernel@vger.kernel.org>\0" + "Cc\0<arnd@arndb.de>" + <tony@atomide.com> + <jg1.han@samsung.com> Keerthy <j-keerthy@ti.com> Rajendra Nayak <rnayak@ti.com> " Paul Walmsley <paul@pwsan.com>\0" @@ -79,4 +79,4 @@ ">>>\n" >> -052841fbbe92c0d044f6f7b0ca9c6041bcfe8e34729e9e92e0be0c9fd62f49bb +7f429eff521398a0db45b2286a2de0f772846c5f5d400d950012496003676307
diff --git a/a/1.txt b/N2/1.txt index 18edae6..fbdc7d5 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -47,7 +47,7 @@ original changelog had no info on it whatsoever. >>> +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi >>> @@ -1152,7 +1152,7 @@ >>> ->>> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux@4ae06118 { +>>> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux at 4ae06118 { >>> compatible = "ti,mux-clock"; >>> - clocks = <&dpll_pcie_ref_ck>, <&pciesref_acs_clk_ck>; >>> + clocks = <&dpll_pcie_ref_m2ldo_ck>, <&pciesref_acs_clk_ck>; diff --git a/a/content_digest b/N2/content_digest index 777aedf..5b868a8 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -2,22 +2,10 @@ "ref\01401345500-20188-8-git-send-email-kishon@ti.com\0" "ref\053A2C5B4.9080300@ti.com\0" "ref\053A2DEDA.5050104@ti.com\0" - "From\0Tero Kristo <t-kristo@ti.com>\0" - "Subject\0Re: [PATCH v2 07/18] ARM: dts: DRA7: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck\0" + "From\0t-kristo@ti.com (Tero Kristo)\0" + "Subject\0[PATCH v2 07/18] ARM: dts: DRA7: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck\0" "Date\0Thu, 19 Jun 2014 16:24:33 +0300\0" - "To\0Kishon Vijay Abraham I <kishon@ti.com>" - devicetree@vger.kernel.org - linux-doc@vger.kernel.org - linux-arm-kernel@lists.infradead.org - linux-omap@vger.kernel.org - linux-pci@vger.kernel.org - " linux-kernel@vger.kernel.org\0" - "Cc\0arnd@arndb.de" - tony@atomide.com - jg1.han@samsung.com - Keerthy <j-keerthy@ti.com> - Rajendra Nayak <rnayak@ti.com> - " Paul Walmsley <paul@pwsan.com>\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On 06/19/2014 04:00 PM, Kishon Vijay Abraham I wrote:\n" @@ -69,7 +57,7 @@ ">>> +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi\n" ">>> @@ -1152,7 +1152,7 @@\n" ">>>\n" - ">>> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux@4ae06118 {\n" + ">>> apll_pcie_in_clk_mux: apll_pcie_in_clk_mux at 4ae06118 {\n" ">>> compatible = \"ti,mux-clock\";\n" ">>> - clocks = <&dpll_pcie_ref_ck>, <&pciesref_acs_clk_ck>;\n" ">>> + clocks = <&dpll_pcie_ref_m2ldo_ck>, <&pciesref_acs_clk_ck>;\n" @@ -79,4 +67,4 @@ ">>>\n" >> -052841fbbe92c0d044f6f7b0ca9c6041bcfe8e34729e9e92e0be0c9fd62f49bb +18cb0d88fd6c000d0b4af8de6cbb68bce1210a9b0a9d8a7939e019ca15ee23b3
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