From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes
Date: Fri, 20 Jun 2014 21:16:55 +0000 [thread overview]
Message-ID: <53A4A4C7.6080203@cogentembedded.com> (raw)
In-Reply-To: <53A4A0E5.50904@cogentembedded.com>
Hello.
On 06/21/2014 01:00 AM, Sergei Shtylyov wrote:
>>> + pci0: pci@ee090000 {
>>> + compatible = "renesas,pci-r8a7790";
>>> + clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
>>> + reg = <0x0 0xee090000 0x0 0xc00>,
>>> + <0x0 0xee080000 0x0 0x1100>;
>>> + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
>>> + status = "disabled";
>>> +
>>> + bus-range = <0 0>;
>>> + #address-cells = >;
>>> + #size-cells = <2>;
>>> + #interrupt-cells = <1>;
>>> + interrupt-map-mask = <0xff00 0 0 0x7>;
>>> + interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
>>> + 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
>>> + 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
>>> + };
>> Hmm, this device node is not actually compliant to the PCI binding,
>> it needs a "ranges" property that can be used to look up the memory
>> and I/O space windows.
> The PCI driver doesn't support I/O space.
Meaning that the hardware doesn't support it...
>> It also needs a device_type property.
> Hm, are you sure about that? I thought only PCI devices should have it...
Seeing it now in 'bus.pci.pdf'. However, it's strange that the PCI devices
also seem to need that...
>> Arnd
WBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: sergei.shtylyov@cogentembedded.com (Sergei Shtylyov)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes
Date: Sat, 21 Jun 2014 01:16:55 +0400 [thread overview]
Message-ID: <53A4A4C7.6080203@cogentembedded.com> (raw)
In-Reply-To: <53A4A0E5.50904@cogentembedded.com>
Hello.
On 06/21/2014 01:00 AM, Sergei Shtylyov wrote:
>>> + pci0: pci at ee090000 {
>>> + compatible = "renesas,pci-r8a7790";
>>> + clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
>>> + reg = <0x0 0xee090000 0x0 0xc00>,
>>> + <0x0 0xee080000 0x0 0x1100>;
>>> + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
>>> + status = "disabled";
>>> +
>>> + bus-range = <0 0>;
>>> + #address-cells = >;
>>> + #size-cells = <2>;
>>> + #interrupt-cells = <1>;
>>> + interrupt-map-mask = <0xff00 0 0 0x7>;
>>> + interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
>>> + 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
>>> + 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
>>> + };
>> Hmm, this device node is not actually compliant to the PCI binding,
>> it needs a "ranges" property that can be used to look up the memory
>> and I/O space windows.
> The PCI driver doesn't support I/O space.
Meaning that the hardware doesn't support it...
>> It also needs a device_type property.
> Hm, are you sure about that? I thought only PCI devices should have it...
Seeing it now in 'bus.pci.pdf'. However, it's strange that the PCI devices
also seem to need that...
>> Arnd
WBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Arnd Bergmann <arnd@arndb.de>
Cc: horms@verge.net.au, linux-sh@vger.kernel.org, robh+dt@kernel.org,
pawel.moll@arm.com, mark.rutland@arm.com,
ijc+devicetree@hellion.org.uk, galak@codeaurora.org,
devicetree@vger.kernel.org, magnus.damm@gmail.com,
linux@arm.linux.org.uk, linux-arm-kernel@lists.infradead.org,
ben.dooks@codethink.co.uk
Subject: Re: [PATCH v4 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes
Date: Sat, 21 Jun 2014 01:16:55 +0400 [thread overview]
Message-ID: <53A4A4C7.6080203@cogentembedded.com> (raw)
In-Reply-To: <53A4A0E5.50904@cogentembedded.com>
Hello.
On 06/21/2014 01:00 AM, Sergei Shtylyov wrote:
>>> + pci0: pci@ee090000 {
>>> + compatible = "renesas,pci-r8a7790";
>>> + clocks = <&mstp7_clks R8A7790_CLK_EHCI>;
>>> + reg = <0x0 0xee090000 0x0 0xc00>,
>>> + <0x0 0xee080000 0x0 0x1100>;
>>> + interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
>>> + status = "disabled";
>>> +
>>> + bus-range = <0 0>;
>>> + #address-cells = >;
>>> + #size-cells = <2>;
>>> + #interrupt-cells = <1>;
>>> + interrupt-map-mask = <0xff00 0 0 0x7>;
>>> + interrupt-map = <0x0000 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
>>> + 0x0800 0 0 1 &gic 0 108 IRQ_TYPE_LEVEL_HIGH
>>> + 0x1000 0 0 2 &gic 0 108 IRQ_TYPE_LEVEL_HIGH>;
>>> + };
>> Hmm, this device node is not actually compliant to the PCI binding,
>> it needs a "ranges" property that can be used to look up the memory
>> and I/O space windows.
> The PCI driver doesn't support I/O space.
Meaning that the hardware doesn't support it...
>> It also needs a device_type property.
> Hm, are you sure about that? I thought only PCI devices should have it...
Seeing it now in 'bus.pci.pdf'. However, it's strange that the PCI devices
also seem to need that...
>> Arnd
WBR, Sergei
next prev parent reply other threads:[~2014-06-20 21:16 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-20 20:34 [PATCH v4 0/2] Add R8A7790/Lager board PCI USB DT support Sergei Shtylyov
2014-06-20 20:34 ` Sergei Shtylyov
2014-06-20 20:34 ` Sergei Shtylyov
2014-06-20 20:36 ` [PATCH v4 1/2] ARM: shmobile: r8a7790: add internal PCI bridge nodes Sergei Shtylyov
2014-06-20 20:36 ` Sergei Shtylyov
2014-06-20 20:36 ` Sergei Shtylyov
2014-06-20 20:51 ` Arnd Bergmann
2014-06-20 20:51 ` Arnd Bergmann
2014-06-20 20:51 ` Arnd Bergmann
2014-06-20 21:00 ` Sergei Shtylyov
2014-06-20 21:00 ` Sergei Shtylyov
2014-06-20 21:00 ` Sergei Shtylyov
2014-06-20 21:10 ` Arnd Bergmann
2014-06-20 21:10 ` Arnd Bergmann
2014-06-20 21:10 ` Arnd Bergmann
2014-06-20 21:25 ` Sergei Shtylyov
2014-06-20 21:25 ` Sergei Shtylyov
2014-06-20 21:25 ` Sergei Shtylyov
2014-06-21 9:15 ` Arnd Bergmann
2014-06-21 9:15 ` Arnd Bergmann
2014-06-21 9:15 ` Arnd Bergmann
2014-06-23 20:40 ` Jason Gunthorpe
2014-06-23 20:40 ` Jason Gunthorpe
2014-06-23 20:40 ` Jason Gunthorpe
2014-06-20 21:16 ` Sergei Shtylyov [this message]
2014-06-20 21:16 ` Sergei Shtylyov
2014-06-20 21:16 ` Sergei Shtylyov
2014-06-20 20:38 ` [PATCH v4 2/2] ARM: shmobile: lager: enable internal PCI Sergei Shtylyov
2014-06-20 20:38 ` Sergei Shtylyov
2014-06-20 20:38 ` Sergei Shtylyov
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