Re: [PATCH 1/2] Revert "drm/radeon: remove drm_vblank_get|put from pflip handling"

["Christian König" <deathsimple@vodafone.de>]

Am 23.06.2014 11:34, schrieb Michel Dänzer:
> On 18.06.2014 18:14, Christian König wrote:
>> Am 18.06.2014 07:53, schrieb Michel Dänzer:
>>> Looking into these issues has got me thinking about the use of the page
>>> flip interrupt: If the page flip interrupt arrives before the
>>> corresponding
>>> vertical blank interrupt, the DRM vblank counter will be lower than
>>> expected by 1 in drm_send_vblank_event(). I suspect this is the cause of
>>>
>>>    (WW) RADEON(0): radeon_dri2_flip_event_handler: Pageflip completion
>>> event has impossible msc [x-1] < target_msc [x]
>>>
>>> messages in the X log file which have been popping up in bug reports
>>> lately.
>>> This also results in 0s being returned to the client for the MSC and
>>> timestamp of the swap completion, which could cause all kinds of bad
>>> behaviour.
>> First of all thanks for looking into it. Are you getting this on 3.16 or
>> 3.15?
> I haven't actually run into this myself yet. I thought I'd seen it in
> several bug reports, but right now I can only find
> https://bugs.freedesktop.org/show_bug.cgi?id=80029#c17 , which seems to
> include the page flipping changes from 3.16.
>
>
>> I don't think that the pflip irq is thrown earlier than the vblank, but
>> on 3.16 it might actually be that we program the flip so fast into the
>> hardware that we do it one frame earlier than planned.
> So userspace is notified of the previous vertical blank period and calls
> the page flip ioctl in response, which then manages to program the
> scanout address update into the hardware before the scanout address
> update is latched during the previous vertical blank period?

Yes correct. That at least sounds like the most likely explanation to me.

> To avoid that scenario, one possibility might be to check if we're in
> vertical blank before calling radeon_page_flip(), and if so sleep for
> 1ms or so before trying again? That might unnecessarily delay flips on
> other CRTCs though...

It won't delay the other CRTCs because each CRTC has it's own kernel 
thread, but it won't be optimal either.

Going to try to reproduce the bug with 3.16,
Christian.
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